Hi,
when investigating issues with the DMA, i found, that the prescaler is not working properly.
At 128 and 64 setting, the initialization of the ADC does not even finish. It is stuck in the loop after enabling the ADC.
SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADC12EN);
delayMicroseconds(1); // CAUTION: Just after enabling the clock for a peripheral, software must wait for a delay before accessing the peripheral registers.
SET_BIT(RCC->CCIPR, RCC_CCIPR_ADC12SEL_1); // PLL clock?
//ADC12_COMMON->CCR |= (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0); // adc_hclk/4
delayMicroseconds(1);
ADC12_COMMON->CCR |= ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0;
ADC1->CR &= ~ADC_CR_DEEPPWD; // Disable power down (is default after reset)
ADC1->CR |= ADC_CR_ADVREGEN; // Enable voltage regulator
delayMicroseconds(25); // Wait for voltage regulator to start up (fixed value of datasheet!)
ADC1->CR |= ADC_CR_ADCAL; // Calibrate single ended (ADCALDIF is default 0)
while(ADC1->CR & ADC_CR_ADCAL); // Wait until calibration has finished
delayMicroseconds(1); // ADC can only be enabled after short wait after ADCAL
ADC1->ISR |= ADC_ISR_ADRDY; // Clear ready bit by writing 1, for reading the right status below
ADC1->CR |= ADC_CR_ADEN; // Enable ADC
while((ADC1->ISR & ADC_ISR_ADRDY) == false); // Wait until ready
Is there a limitation, that i am not aware of?
