STM32G4 peripheral-to-memory DMA configured with CubeMX seems backward

[KHarb.1]

I am using CubeIDE, and I want an output compare event on TIM8 CH1 to trigger a DMA transfer to a single memory location. I’ve selected ‘Peripheral to Memory’ as the direction, but I’m observing the contents of the memory location being copied to the CCR1 register instead of the other way around. This also happens in ‘Memory to Peripheral’ mode, which would be expected to have opposite behavior.

Using ST-link, I can seed the DMA1 registers configured in peripheral to memory mode:
DIR = 0 (Per documentation this is correct)
CMAR register maps to 0x40013434, which is the TIM8->CCR1 address. (Should be the memory address though)
CPAR = 0x20000000 This maps to the base address of the SRAM section. This should be the peripheral address.

If I switch to memory to peripheral mode, see the contents of the CMAR and CPAR registers switch, but I also see DIR switch so the two changes together seem like they may be cancelling to enable only memory to peripheral behavior.

If this is indeed a bug, what manual changes do I need to make to repair the generated code?

[waclawek.jan]

> If this is indeed a bug,

I don't use Cube and it indeed does have bugs as all software does, but more often than not, it's just improper usage.

Nonetheless, if you want anything not that usual, you are better off abandoning Cube completely, as otherwise it gets into your way more than it helps. Mind, Cube is written in "usual cases" in mind, whatever they are.

> what manual changes do I need to make to repair the generated code?

You've already described it - use the proper direction and proper address settings in DAC.

JW

[KHarb.1 · Accepted solution]

I had some bad test data bite me...but the workaround functions just fine. Just change the CPAR and CMAR registers manually after the DMA init command.