Application needs to use all three (in STM32G431) op amps as inverting PGA handling ac-coupled signals. As there's no internal option to supply mid-point (VREF/2 with a decoupling cap at the device pin) to the non-inverting inputs of the (3) op amps - only OPAMP1 non-inverting input can be internally sourced (with DAC), I expect to supply VREF/2 externally to each of the three pins, one for each op amp's non-inverting input, using voltage divider from VREF source and decoupling cap between the divider and the pin.
Assuming I'm approaching this correctly, my question is this - can I just tie the three pins together and supply them with a single VREF/2 voltage, or do I need to create three copies of VREF/2 and supply each of the three pins separately? Is cross-talk a concern if I do this (tie the three pins together)?
Thanks for any advice, and happy to fill in any blanks that I've left (typically happens) off my initial post!
No problem, OPAs have very high input impedance - no interaction if 3 or even more OPA's non-inverting inputs connected. You can use high value resistors for divider (100k - 1M) and 0.1uF capacitor between divider mid-point and ground to reduce noise level.
Thanks - that's helpful for sure. Here's a "for extra credit" problem - LQFP48 package is very pin constrained for this application (and I can't go to LQFP64 or 100). Can you think of any way I could configure all three op amp non-inverting inputs to go to the same (single) external pin? Right now, even with all three op amp non-inverting inputs fed by the same source (that does help reduce parts count), I am still "burning" two pins going to the same source.
Thanks again for the quick and helpful reply (my last dealings with op amps were in undergrad EE course in about 1976, so rust runs somewhat deep at this point!)
Inverting is not required on it's own, but I think it's necessary to accomplish a PGA that doesn't also apply gain to the DC offset (mid-point - VREF+/2) necessary to handle an AC signal.
In the case of inverting PGA, I'd bias the non-inverting inputs to VREF+/2; this would cause the inverting inputs to be at VREF+/2, held there by behavior of the amplifier. That way, I can couple the (AC) input signal via a blocking cap into the inverting input without the need to superimpose the VREF+/2 bias voltage --- on the pin side of the blocking cap, the voltage there would be VREF+/2 +/- instantaneous AC voltage. The op amp output (tied internally to an ADC input) would likewise be at VFEF+/2 +/- amplified instantaneous AC voltage. The key goal of this layout is that the VREF+/2 bias voltage (at non-inverting input and at op amp output) would be independent of the PGA gain setting (only amplitude of the AC component would be affected by gain.)
In the case of using non-inverting PGA for this application, the VREF+/2 bias would need to be applied to the inverting input so that the non-inverting input would be at VREF+/2 and see the AC-coupled input signal. The problem with this, as I understand it, is that changing the gain parameter (feedback resistance between output and inverting input) would now involve the VREF+/2 bias voltage, so that the op amp output DC bias offset (intended to be VREF+/2) would no longer be independent of gain.
Does this help explain what I'm trying to do (and if I'm going about this wrong, I'd be very grateful for advice!)