STM32G030F6 uart dma idle interrut CNDTR not work properly

[XWang.4]

Hi, team,

I am work on stm32g030f6's uart dma. And config them as idle interrut mode to receive data.

When the uart data on high frequence like 10bytes/30ms , the CNDTR will be aways MY_BUFF_LEN -1 , so i only can receive 1 byte data. After reset the power it will be ok, i already test the code on stm32f103 and worked properly. But not good on stm32g030 !!! Help guys! i think stm32g030 has bug on dma CNDTR register

[TDK]

If CNDTR = MY_BUFF_LEN - 1, it means the DMA can receive that many more bytes before stopping.

If CNDTR is frozen at that value, despite signals being sent, it could be because the DMA had an error and stopped itself. Examine the DMA->ISR register to investigate.