STM32F746xx lazy context saving

[AVI-crak]

Posted on July 02, 2016 at 06:57

I adapting their suffering under the new axis of the core, and I am having difficulties.

STM32F7xx series differs from series STM32F3-4 advanced floating point register set (s0-s31). This is automatically saved Jr. set of registers (s0-s15). But GCC uses the full potential of the coprocessor, and therefore the senior set (s16-s31) is becoming common for the different strands.No problem, the use of mathematics in a problem. But things are changing with more complex projects.I am interested in solutions to this probolemy. I want to first see how to do it from others. Because my fastest option looks like a set of garden tools, and not too handsome. #lazy-context-saving

[AVI-crak]

Posted on July 08, 2016 at 09:21

A long way has been faster.

Save / restore all at once, it was cheaper to save on memory. The processing time is very much reduced, if you remove all of the search logic to transmit data interrupt. Now all the tasks, without exception, have the math, even those - that it is not needed.But I find it strange to ignore my problem from the support.�?�?�?¾�?»�?³�?¸�?¹ �?¿ÑƒÑ‚ÑŒ �?¾�?º�?°�?·�?°�?»Ñ�Ñ� �?±�?¾�?»�?µ�?µ �?±Ñ‹Ñ�тры�?¼.�?¡�?¾Ñ…Ñ€�?°�?½Ñ�ÑŽ/�?²�?¾Ñ�Ñ�Ñ‚�?°�?½�?°�?²�?»�?¸�?²�?°ÑŽ �?²Ñ�Ñ‘ Ñ€�?°�?·�?¾�?¼, Ñ�Ñ‚�?¾ �?¾�?º�?°�?·�?°�?»�?¾Ñ�ÑŒ �?´�?µÑˆ�?µ�?²�?»�?µ Ñ��?º�?¾�?½�?¾�?¼�?¸�?¸ �?½�?° �?¿�?°�?¼Ñ�Ñ‚�?¸. �?’Ñ€�?µ�?¼Ñ� �?¾�?±Ñ€�?°�?±�?¾Ñ‚�?º�?¸ �?¾Ñ‡�?µ�?½ÑŒ Ñ��?¸�?»ÑŒ�?½�?¾ Ñ��?¾�?ºÑ€�?°Ñ‰�?°�?µÑ‚Ñ�Ñ�, �?µÑ��?»�?¸ у�?±Ñ€�?°Ñ‚ÑŒ �?²Ñ�ÑŽ �?»�?¾�?³�?¸�?ºÑƒ �?¿�?¾�?¸Ñ��?º�?° �?¿�?µÑ€�?µ�?´�?°�?²�?°�?µ�?¼Ñ‹Ñ… �?² �?¿Ñ€�?µÑ€Ñ‹�?²�?°�?½�?¸�?µ �?´�?°�?½�?½Ñ‹Ñ…. �?¢�?µ�?¿�?µÑ€ÑŒ �?²Ñ��?µ �?·�?°�?´�?°Ñ‡�?¸ �?±�?µ�?· �?¸Ñ��?º�?»ÑŽÑ‡�?µ�?½�?¸Ñ� �?¸�?¼�?µÑŽÑ‚ �?¼�?°Ñ‚�?µ�?¼�?°Ñ‚�?¸�?ºÑƒ, �?´�?°�?¶�?µ Ñ‚�?µ - �?º�?¾Ñ‚�?¾Ñ€Ñ‹�?¼ �?¾�?½�?° �?½�?µ �?½Ñƒ�?¶�?½�?°. �?��?¾ Ñ� Ñ�ч�?¸Ñ‚�?°ÑŽ Ñ�Ñ‚Ñ€�?°�?½�?½Ñ‹�?¼ �?¸�?³�?½�?¾Ñ€�?¸Ñ€�?¾�?²�?°�?½�?¸�?µ �?¼�?¾�?µ�?¹ �?¿Ñ€�?¾�?±�?»�?µ�?¼Ñ‹ Ñ��?¾ Ñ�Ñ‚�?¾Ñ€�?¾�?½Ñ‹ Ñ��?»Ñƒ�?¶�?±Ñ‹ �?¿�?¾�?´�?´�?µÑ€�?¶�?º�?¸.

[AvaTar]

Posted on July 08, 2016 at 10:16

> But I find it strange to ignore my problem from the support.

I assume you know this is not an official ST support line, but just a user forum. And your first post was rather difficult to understand, most of the meaning probably got lost in the automatic translator software ...

[AVI-crak]

Posted on July 08, 2016 at 17:08

This is the problem of free interpreter from .google.

I will try to say in simple words.I wrote its own operating system for chip st Cortex-M3 and above. 

https://bitbucket.org/AVI-crak/rtos-cortex-m3-gcc/commits/branch/default

OS runs on Cortex-M7, but without the inclusion of mathematics.Now I partially rewrite the code of its OS, to be able to complete the work with mathematics.The solution was simple, save mathematics from each stream./* STACK_Fx -96,-36,-32,-28,-24,-20,-16,-12, -8, -4,   0,  4,  8, 12,  16, 20, 24,  28, 32,~ 96,  100,  104 *//*          s16~s31, r4, r5, r6, r7, r8, r9,r10,r11,H,r0, r1, r2, r3, r12, LR, PC,xPSR, s0,-s15,fpscr,/0x0/ */

[AvaTar]

Posted on July 10, 2016 at 13:25

I'm more or less starting with the M7, but I'm not aware of significant differences regarding the stack frame.

If you use the FPU in both main code and exception code, you need to enable the ''large'' stack frame (including S0 ..S15) on the M4 as well.

[Tesla DeLorean]

Posted on July 10, 2016 at 15:04

Intel used to have a flag indicating if the FPU registers had been touched by a task, ARM as I recall doesn't see the value of using gates/transistors in this fashion.

It is probably unwise to use the FPU in interrupts, unless you have a clear idea of what registers are going to be touched, and just saving those. In a multi-threaded OS you're just going to have to save/restore everything, or keep FPU math in a single thread.

[Danish1]

Posted on July 10, 2016 at 16:52

I think that this is an interaction between GCC and the arm cortex m7 fpu.

And that there is little that ST can do to help you.I note that arm have an application note which suggests your RTOS needs to manually store and restore S16-S31 on a context switch.From the link expand the ''Handling of context switching in a RTOS'' on the left-hand side and look it option 3http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0298a/ar01s04.html''Alternative context switching scheme'' is also worth looking at.It would be nice if gcc had a compile-time switch to only use the registers that are automagically saved. But I don't know how that would hit performance compared with the extra work of context save/restore. It very much depends how much fpu your code uses in each thread.I had one application where one thread did most of the fpu work, and other threads might rarely and occasionally use the fpu deep down in a subroutine. At their top level I had a special call to turn the fpu off if it had been turned on since I knew its context did not need to be saved. This, I reckoned, would reduce the need for the lazy-fpu-stacking to occur.Hope this helps,Danish

[AVI-crak]

Posted on October 21, 2016 at 14:21

I forgot boast.

https://bitbucket.org/AVI-crak/rtos-cortex-m3-gcc/src/dcf6d10bcde20bab33f5fc4e4832478c45f54746?at=default