2017-12-17 02:34 AM
Hello.
I have STM32F767 interfaced with FPGA with 32b SRAM interface ( same board STM32F479, and it works extremely well)I checked IO pins, at the moment only CS, toggled it manually, FPGA can see it at 109MHz, no problem whats so everBut when i try to use HALL and SRAM interface, i get nothing.
Here is my config:
void SRAM_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
SRAM_HandleTypeDef hsram1;
FMC_NORSRAM_TimingTypeDef Timing;
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_FMC_CLK_ENABLE() ;
GPIO_InitStruct.Pin =GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7||GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_FMC;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_3|GPIO_PIN_2|GPIO_PIN_1 |GPIO_PIN_0|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_8 |GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_12|GPIO_PIN_15|GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_FMC;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_15 |GPIO_PIN_13|GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_FMC;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_12|GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_2|GPIO_PIN_0|GPIO_PIN_5|GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_FMC;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_12|GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_8|GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_FMC;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_3|GPIO_PIN_2|GPIO_PIN_5 |GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_6|GPIO_PIN_1 |GPIO_PIN_9|GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_FMC;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
SRAM_HandleTypeDef sramHandle;
sramHandle.Instance = FMC_NORSRAM_DEVICE;
sramHandle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
/* Timing configuration derived from system clock (up to 216Mhz)
for 108Mhz as SRAM clock frequency */
Timing.AddressSetupTime = 2;
Timing.AddressHoldTime = 1;
Timing.DataSetupTime = 2;
Timing.BusTurnAroundDuration = 1;
Timing.CLKDivision = 2;
Timing.DataLatency = 2;
Timing.AccessMode = FMC_ACCESS_MODE_A;
sramHandle.Init.NSBank = FMC_NORSRAM_BANK3;
sramHandle.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
sramHandle.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
sramHandle.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_32;
sramHandle.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
sramHandle.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
sramHandle.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
sramHandle.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
sramHandle.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
sramHandle.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
sramHandle.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
sramHandle.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
sramHandle.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
/* Initialize the SRAM controller */
if(HAL_SRAM_Init(&sramHandle, &Timing, &Timing) != HAL_OK)
{
/* Initialization Error */
Error_Handler();
}
}
Ok, first this i didint like, i have defined STM32F767xx in PreProcessor Defined symbols field. That means in same library i have multiple definitions of AF GPIO_AF9_FMC;
Copy lines in order:
#if define(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
#define GPIO_AF9_FMC ((uint8_t)0x09U) /* FMC Alternate Function mapping */
#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
#define GPIO_AF12_FMC ((uint8_t)0xCU) /* FMC Alternate Function mapping */
So this is only small thing. Which one is correct one ? Any way, this also does not solve the problem, so i don't know whats wrong....
2017-12-17 02:59 AM
Oh,
for crying out loud, None, and i mean, none of STM32F7 examples will all optimizations levels ( none, low, mid, high) does not produce any activity on SRAM pins. Even example projects, where is writing and reading data and comparing if it's correct. So good job ST with HALL !!!
I knew HALL is buggy, but not that much !!!! SPL worked first time every time. ( since i have STM32F469 that is pin to pin compatible, i know that this board is functional )And please not, with simple test of GPIO toggle, i can verify that i have good connection between FPGA and STM32F7
IAR ARM Version is 8.20.1.14