STM32F446 HAL RCC PLLR bug

tm3341 · ‎2015-07-10

Posted on July 10, 2015 at 20:59

Hello ST developers,

I still don't know why I switched to HAL drivers (probably because there is no STD drivers for F7 lines) but I read MANY, MANY bugs in HAL library for F4 and after starting developing generic library for HAL drivers for F4 series, I found a bug.

If STM32F446xx is selected, PLLR is added to structure for PLL configuration.

But this value is never set to real registers in function HAL_RCC_OscConfig.

Please do non-buggy version or go back to STD drivers. There were never so big bugs like on this HAL drivers.

I wish you a nice day to all.

Montassar BEN ROMDHANE_O · ‎2015-07-15

Posted on July 15, 2015 at 17:58

Hi majerle.tilen,

I did test using

STM32CubeF4_1.7.0 package
STM32446E-EVAL board
EWARM 7.40
Tested example: Firmware\Projects\STM32446E_EVAL\Examples\HAL\HAL_TimeBase
Select PLLR as Clock system ( RCC_ClkInitStruct.SYSCLKSource =RCC_SYSCLKSOURCE_PLLRCLK)
Run the example with different System clock frequencies by changing the PLLR division factor
Output the system clock frequency on MCO1 pin(PA8) or on MCO2 pin(PC9)t using HAL_RCC_MCOConfig() function

==> The example works correctly and the system clock frequency get changed each time I change the PLLR configuration

Could you provide a little more information about the STM32CubeF4 FW package and the IDE toolchain you are using, so we can better explain it to our development team...

Best regards,

Heisenberg.