STM32F417 ADC DMA synchronization

[developer2]

Posted on April 24, 2014 at 17:31

Hi All, 

i'm running ADC example from STM's examples, and i'm having repeated values on 100kHz sinusoidal signal , probably it's not possible to sample it to have good resolution but it's only test for repeating , if i set 3cycles measuring i got only 1 repeated values this is the output from 15cycles instead of 3cycles measuring, please somebody could redirect me to the right discussion ? or somebody could help me to configure something to correct configuration ? ADC2 High : ADC1 Low: 088f0869 ADC1 High : ADC3 Low: 092a08c4 ADC3 High : ADC2 Low: 0a5809a8 ADC2 High : ADC1 Low: 0a5809a8 ADC1 High : ADC3 Low: 0a5809a8 ADC3 High : ADC2 Low: 0a5809a8 ADC2 High : ADC1 Low: 0a5809a8 ADC1 High : ADC3 Low: 0a5809a8 ADC3 High : ADC2 Low: 0a5809a8 ADC2 High : ADC1 Low: 0a5809a8 ADC1 High : ADC3 Low: 0a5809a8 ADC3 High : ADC2 Low: 0a5809a8 ADC2 High : ADC1 Low: 0bbd0b14 ADC1 High : ADC3 Low: 0c9c0c42 ADC3 High : ADC2 Low: 0cce0cc9 ADC2 High : ADC1 Low: 0cce0cc9 ADC1 High : ADC3 Low: 0cce0cc9 ADC3 High : ADC2 Low: 0cce0cc9 ADC2 High : ADC1 Low: 0cce0cc9 ADC1 High : ADC3 Low: 0cce0cc9 ADC3 High : ADC2 Low: 0cce0cc9 ADC2 High : ADC1 Low: 0cce0cc9 ADC1 High : ADC3 Low: 0cce0cc9 ADC3 High : ADC2 Low: 0cce0cc9 ADC2 High : ADC1 Low: 0c870cb7 ADC1 High : ADC3 Low: 0bf60c4c ADC3 High : ADC2 Low: 0af30b7b ADC2 High : ADC1 Low: 0af30b7b ADC1 High : ADC3 Low: 0af30b7b ADC3 High : ADC2 Low: 0af30b7b ADC2 High : ADC1 Low: 0af30b7b ADC1 High : ADC3 Low: 0af30b7b ADC3 High : ADC2 Low: 0af30b7b ADC2 High : ADC1 Low: 0af30b7b ADC1 High : ADC3 Low: 0af30b7b ADC3 High : ADC2 Low: 0af30b7b ADC2 High : ADC1 Low: 09a20a50 ADC1 High : ADC3 Low: 08840900 ADC3 High : ADC2 Low: 083c0845 ADC2 High : ADC1 Low: 083c0845 ADC1 High : ADC3 Low: 083c0845 ADC3 High : ADC2 Low: 083c0845 ADC2 High : ADC1 Low: 083c0845 ADC1 High : ADC3 Low: 083c0845 ADC3 High : ADC2 Low: 083c0845 ADC2 High : ADC1 Low: 083c0845 ADC1 High : ADC3 Low: 083c0845 ADC3 High : ADC2 Low: 083c0845 ADC2 High : ADC1 Low: 08780847 ADC1 High : ADC3 Low: 08fc08b7 ADC3 High : ADC2 Low: 09d30959 ADC2 High : ADC1 Low: 09d30959 ADC1 High : ADC3 Low: 09d30959 ADC3 High : ADC2 Low: 09d30959 ADC2 High : ADC1 Low: 09d30959 ADC1 High : ADC3 Low: 09d30959 ADC3 High : ADC2 Low: 09d30959 ADC2 High : ADC1 Low: 09d30959 ADC1 High : ADC3 Low: 09d30959 ADC3 High : ADC2 Low: 09d30959 ADC2 High : ADC1 Low: 0b300a76 ADC1 High : ADC3 Low: 0c620bda ADC3 High : ADC2 Low: 0cdd0cb8 ADC2 High : ADC1 Low: 0cdd0cb8 ADC1 High : ADC3 Low: 0cdd0cb8 ADC3 High : ADC2 Low: 0cdd0cb8 ADC2 High : ADC1 Low: 0cdd0cb8 ADC1 High : ADC3 Low: 0cdd0cb8 ADC3 High : ADC2 Low: 0cdd0cb8 ADC2 High : ADC1 Low: 0cdd0cb8 ADC1 High : ADC3 Low: 0cdd0cb8 ADC3 High : ADC2 Low: 0cdd0cb8 Thanks for all replies ... 

[Tesla DeLorean]

Posted on April 24, 2014 at 18:03

I have no idea what you're describing.

[developer2]

Posted on April 24, 2014 at 18:10

Hi Clive1, 

i tried to run STM's example for ADC, and i got output like that , it seems that DMA is taking values from ADC when ADC did not prepared values ... or DMA got ADC's trigger more times than ADC is triggering ...i think i have something badly configured  

[developer2]

Posted on April 24, 2014 at 18:11

Hi Clive1, 

i tried to run STM's example for ADC, and i got output like that , it seems that DMA is taking values from ADC when ADC did not prepared values ... or DMA got ADC's trigger more times than ADC is triggering ...i think i have something badly configured  

[Tesla DeLorean]

Posted on April 24, 2014 at 19:49

i tried to run STM's example for ADC, 

What example? If you can possibly specify a directory path within a firmware library it might reduce the universe of possibilities a bit. Or share the code, board, or configuration details. Assume I don't know what's in your head, or what you're doing, or how you might of configured things badly. I'd need to know what you've configured, and how.

[developer2]

Posted on April 24, 2014 at 19:57

 STM32F4xx_DSP_StdPeriph_Lib_V1.0.0 

/Project/STM32F4xx_StdPeriph_Examples/ADC/TripleADC_Interleaved_DMAmode2  * @file    ADC/TripleADC_Interleaved_DMAmode2/main.c  * @author  MCD Application Team  * @version V1.0.0  * @date    30-September-2011  * @brief   Main program bodyand difference between   * @file    ADC/ADC_TripleModeInterleaved/main.c  * @author  MCD Application Team  * @version V1.1.0  * @date    18-January-2013  * @brief   Main program bodyis in ADC1 trigger ... 1.0.0 ... ADC_SoftwareStartConv(ADC1);1.1.0 ... ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; 

[Tesla DeLorean]

Posted on April 24, 2014 at 20:00

And how are you printing this data? You understand that DMA will continue in the background concurrently with what ever the processor is doing. Unless you are capturing and storing measurements they could change quicker than you can print them.

[developer2]

Posted on April 24, 2014 at 20:08

... i'm doing single reading into 300 * word buffer , 

so when i read measured data i'm sure that buffer is untouched by processes or DMA ... 

[Tesla DeLorean]

Posted on April 24, 2014 at 21:09

Neither of these examples is triggered by a timer.

Both use DMA in a circular mode. Present YOUR code.

[developer2]

Posted on April 24, 2014 at 21:13

here is it : 

  RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3 , ENABLE);  RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOC , ENABLE);  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3;  GPIO_Init( GPIOC , &GPIO_InitStructure);  DMA_InitTypeDef DMA_InitStructure;  ADC_InitTypeDef       ADC_InitStructure;  ADC_CommonInitTypeDef ADC_CommonInitStructure;  RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA2, ENABLE);#define ADC_CDR_ADDRESS ((uint32_t)0x40012308)  DMA_DeInit( DMA2_Stream0 );  /* DMA2 Stream0 channel0 configuration */  DMA_InitStructure.DMA_Channel = DMA_Channel_0;  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC_CDR_ADDRESS;  DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC_Buffer_Main;  DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;  DMA_InitStructure.DMA_BufferSize = 3*100;  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;

  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

  DMA_InitStructure.DMA_Priority = DMA_Priority_High;  DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;  DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;  DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;  DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;  DMA_Init(DMA2_Stream0, &DMA_InitStructure);  DMA_ITConfig( DMA2_Stream0, DMA_IT_TC, ENABLE);  /* DMA2_Stream0 enable */  DMA_Cmd(DMA2_Stream0, ENABLE);/******************************************************************************//*  ADCs configuration: triple interleaved with 5cycles delay to reach 6Msps  *//******************************************************************************/  /* ADC Common configuration *************************************************/  ADC_CommonInitStructure.ADC_Mode = ADC_TripleMode_Interl;  ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;  ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_2;  ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;  ADC_CommonInit(&ADC_CommonInitStructure);  /* ADC1 regular channel 12 configuration ************************************/  ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;  ADC_InitStructure.ADC_ScanConvMode = DISABLE;  ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;  ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;  ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;  ADC_InitStructure.ADC_NbrOfConversion = 1;  ADC_Init(ADC1, &ADC_InitStructure);  ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_3Cycles);  /* Enable ADC1 DMA */  ADC_DMACmd(ADC1, ENABLE);  /* ADC2 regular channel 12 configuration ************************************/  ADC_Init(ADC2, &ADC_InitStructure);  /* ADC2 regular channel12 configuration */  ADC_RegularChannelConfig(ADC2, ADC_Channel_10, 1, ADC_SampleTime_3Cycles);  /* ADC3 regular channel 12 configuration ************************************/  ADC_Init(ADC3, &ADC_InitStructure);  /* ADC3 regular channel12 configuration */  ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 1, ADC_SampleTime_3Cycles);  /* Enable DMA request after last transfer (multi-ADC mode) ******************/  ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE);  DMA_Cmd( DMA2_Stream0, ENABLE);  DMA_ClearFlag( DMA2_Stream0, DMA_FLAG_TCIF0 | DMA_FLAG_HTIF0 );   ADC_Cmd(ADC1, ENABLE);  ADC_Cmd(ADC2, ENABLE);  ADC_Cmd(ADC3, ENABLE);  ADC_SoftwareStartConv(ADC1);