2025-07-14 8:28 PM
Hello,
The problem is that we have made 50 customized boards using STM32F412RET6TR, 2 of them has the same issue. It does not run the code (forzen) at cold start up, but will work after a manual reset or power unstable.
One Device was fixed by replacing the MCU, another was remaining for investigating the issue.
Initially, I thought it is the problem of start up reset was released to early, so an RC mod was added to the reset line, but it does not work. Probe on the reset signal and VDD was normal. And later debug shows that the program hit the Reset_Handler and failed in SystemClock_Config section.
Here's some log:
Attached crystal layout and both cap are 18pF, Crystal is 728-1073-2-ND
Can you help me with this issue?
2025-07-14 8:30 PM
Thanks a lot if anyone could help!
2025-07-14 8:52 PM
Will it start if you increase the timeout say to 15 seconds?
LSE startup longer than 5 seconds may be normal.
How is VBAT connected?
JW
2025-07-14 9:14 PM - edited 2025-07-14 9:15 PM
How is VBAT connected? Do things change if you connect VBAT to GND?
Jan beat me to it.
2025-07-14 9:21 PM
Currently it does not work when I increase the timeout to 15 seconds. And the board currently do not run after manual reset.
VBAT is directly connected to my VDD
2025-07-14 10:27 PM
Let's start with this:
> VBAT is directly connected to my VDD
In that case make sure you perform an explicit backup-domain reset after program startup, due to the "backup-domain brownout" erratum.
If that still won't help at that particular board, I'd suspect damaged crystal.
You are surely aware of AN2867 and the crystal choice and layout recommendations therein.
JW
2025-07-14 10:32 PM
Hi@TDK ,
Sorry, but I don't quite understand your comment. Did you mean, connecting VBAT to GND during powerdown, to make sure the backup domain gets reset?
Jan
2025-07-14 10:36 PM
> Try to probe the 32kHz Crystal OSC32 OUT, and some other tests, then #77 always get into fault_handler, manual reset will not make it working. So LSE is completely broken
Those crystals are very high impedance, probing and measuring without interference is far from trivial.
And if I remember correctly, LSE quartz devices work in a less favourable mechanical oscillation mode, and are thus far mor susceptable to environmental influences than "usual" devices in the lower MHz-range.
As a test, you could try to warm up the "critical" devices to about 35...45°C, and see if startup behavior improves.
2025-07-14 11:42 PM
Hi Jan,
Thanks for the suggestions.
I tried adding:
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
at the beginning of SystemClock_Config function. But it didnt help.
Also Tried replace another crystal from a working board, and the problem remains the same.
Cause the board behavior is not exactly same as the beginning, Is the chance of OSC32 oscllator broke high?
Besides, I also measured VCAP_1 voltage is around 1.1V in when chip in error handler, 1.3V when normal running. Hope it can provide some clues.
Regards,
Leo
2025-07-14 11:44 PM
Hi Ozone,
Yes, you are right. I barely able to get the measurement of the clock waveform.
I tried heat the Crystal a bit using hot air. But it didnt seems help.
Thanks,
Leo