Posted on December 23, 2012 at 23:00This problem has me stumped for the past three days. Before I get into the problem I have a few questions. When I look at the memory maps, are addresses, eg. 0x0800 0000, in byte format or word format?
I am using STM32F407 and running IAR EWARM.
As far as I can tell, I believe the 64KB CCM is at 0x1000 0000 and the 112KB SRAM begins at 0x2000 0000. Where does the 16KB SRAM begin? (again are these byte addresses?)
My problem is I am running two DMA2 operations.
SPI1_TX on DMA2 Stream5 Channel3, memory to peripheral,
and DCMI on DMA2 Stream1 Channel1, peripheral to memory
I can get the SPI1_TX running fine. The strange thing is I have gotten both DMA requests to work on a number of occasions in the past but sometimes it fails. Now the failure is permanent.
The symptom is whenever I enable the DCMI DMA, the SPI DMA fails, DMA_S5CR EN = 0 , the error is usually transfer error and FIFO error, or AHB bus error, as if there is contention somewhere.
The DCMI requests are running at 42MHz.
I tried separating the two memory requests into the separate 112KB and 16KB blocks with no luck. I tried changing priorities by moving to different streams.
The puzzling thing is why it would work sometimes.
