STM32F4 SPI DMA simple question

[goweekend]

Posted on November 28, 2016 at 17:27

Hi,

I am a newbie developer on stm32 and iar.

I have a simple question about spi DMA. 

I use a stm32f412 mcu as a SPI slave device,when the DMA controller on the stm32 mcu is starting to move data from tx buffer to spi data register(SPI->DR) and doing data transmission between master and slave device,  will my main process(application code like main.c) continue or suspend until transmission complete?Do I need to keep the tx buffer unwrittable in my application code while HAL_SPI_TransmitReceive_DMA() is transfering data? #spi-dma-stm32f412

[waclawek.jan]

Posted on November 28, 2016 at 17:54

> when the DMA controller on the stm32 mcu is starting to move data from tx buffer to spi data

> register(SPI->DR) and doing data transmission between master and slave device,  

> will my main process(application code like main.c) continue or suspend until transmission complete?

The point of DMA is to do data transfers independently from the processor. Of course, you can always write: while(DMA_has_not_finished) {   do_nothing(); } > Do I need to keep the tx buffer unwrittable in my application code while HAL_SPI_TransmitReceive_DMA() is transfering data?

I don't know what HAL_SPI_TransmitReceive_DMA() does, whether it's blocking (i.e. contains the loop I wrote above) or not - refer to its description/manual etc.

JW

[slimen]

Posted on November 29, 2016 at 11:03

Hello,

Refer to your reference manual 

http://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf

 on SPI section for more clarification about Data transmission and reception procedures.Regards

[Seb]

Posted on December 16, 2016 at 21:35

If using SPI Slave mode, then one possible implementation is to implement DMA in cyclical buffer mode (for both RX_buffer and TX_buffer). The DMA may not need to use interrupt. Then implement NSS on master side and use EXTI interrupt on rising edge of NSS GPIO. When NSS goes high (controlled by SPI Master), you can look at the received buffer, prepare the next transmit buffer and rearm the DMA to point to the first byte of these buffers. This makes most of the low level job transparent from the main sw loop. The exchange of flags and data between the interrupt and the main loop depends on what is needed in the application. Most of the time, set a flag in the interrupt and poll it in the main loop and clear it once the buffer is processed.