2012-09-12 12:43 PM
According to the datasheet, the STM32F4 processors can accept up to 50MHz on the external clock input, but the clock configuration tool only permits inputs up to 25MHz. Is this intentional? Does that mean there's some caveat to higher input clocks that I don't know about?
Thanks for the insight!-Sasha2012-09-12 01:44 PM
Does that mean there's some caveat to higher input clocks that I don't know about?
I think it means the crystal oscillator circuit is rated from 4-26 MHz (or 4-16 if you look at the block diagram). So the ability of OSC_IN/OSC_OUT to sustain a stable oscillation in a suitable crystal, and circuit configuration. They specify an external clock (OSC_IN Only) from 1-50 MHz ''By Design, Not tested in production'' The PLL needs to be clocked in the 1-2 MHz range for it's comparison frequency (PLL_M, valid range 2-63) You need to use the HSEBYP and HSEON bits in the RCC_CR to use an EXTERNAL source, ie it turns OFF the OSC_OUT driver AHB must be at least 25 MHz for Ethernet operation.