STM32F373 design queries

[PK K]

Posted on October 24, 2017 at 16:00

We are planning to use

STM32F373RBT6 for the replacement of ATMEL XMEGA_128:

I have the following queries related to the design as per my understandings:

• Is USB2.0 will support device mode only and will be used to load the firmware or debugging purpose?
• We are planning to use JTAG with SWD [20-pin connector], UART1 with BOOT0 signal as connected in EVM or USB ports for board bring up and firmware update. Does ETM Trace debugging connector is still needed in the board. Please confirm?
• BOOT0 pin is available in the STM32 device. Please share the description when it is connected to VCC & GND?
• BOOT1 bit is SW configurable based on the boot option requirements. Please confirm?
• External

  8-MHz crystal is needed when you select USB2.0 as per Cube recommendation. Please confirm?

• Why Bootloader_BOOT0 is managed by pin 6 of connector CN12 (RS-232 DSR signal) in the EVM. Please provide more information?
• VREF+ is to be connected to 2.6V If I want to operate the ADC, COMP, DAC with this reference voltage, please confirm?

[Tesla DeLorean]

Posted on October 24, 2017 at 17:26

You really should read the manuals thoroughly, advice here doesn't mitigate your need to do you own due diligence.

Consider using the new 10-pin SWD header. Trace header is not required unless you need that for your development work/processes.

BOOT0=High Goes into ROM and runs the System Loader, support for USART1 loader, or USB DFU loader

BOOT0=Low Goes into your FLASH code.

Don't recall BOOT1 being configurable in this part, review documentation. I'd put a pull-down on BOOT1

Several external crystal values should provide USB support, 8 MHz is one generally used, others might be more preferable in other aspects of the design. Pick one that is supported, and meets your needs.

BOOT pin to RS232 allows for some mode control, perhaps undesirable in a retail offering.

Watch for maximum allowable differences in VDD, VDDA and VREF+

Experiment with DISCO/NUCLEO boards in the F3 series before committing to PCB design

[Amel NASRI]

Posted on October 24, 2017 at 19:04

Hi

pench.crl

‌,

Is USB2.0 will support device mode only and will be used to load the firmware or debugging purpose?

USB can be used to load firmware based on DFU protocol. But also, the STM32F373 can be used as an USB device connected to a given host.

You can refer to examples under STM32Cube_FW_F3_V1.9.0\Projects\STM32373C_EVAL\Applications\USB_Device for some use applications (CDC, MSC, DFU, HID).

We are planning to use JTAG with SWD [20-pin connector], UART1 with BOOT0 signal as connected in EVM or USB ports for board bring up and firmware update.

Does ETM Trace debugging connector is still needed in the board. Please confirm?

No it is not required.

BOOT0 pin is available in the STM32 device. Please share the description when it is connected to VCC & GND?

If it is connected to VCC, you will boot from Flash memory. Otherwise, you will boot from System memory or SRAM (depending on the value of BOOT1 bit).

BOOT1 bit is SW configurable based on the boot option requirements. Please confirm?

yes it is. Please refer to the section 'Boot configuration' in AN4206 or in RM0

External 8-MHz crystal is needed when you select USB2.0 as per Cube recommendation. Please confirm?

HSE usage is recommended for DFU usage. But for USB usage, it is required to have the 48MHz as USB clock.

Why Bootloader_BOOT0 is managed by pin 6 of connector CN12 (RS-232 DSR signal) in the EVM. Please provide more information?

this is a specific configuration in the STM32373C-EVAL evaluation board, while the default setting is that Boot0-related jumper isn't fitted (as specified in UM1564).

VREF+ is to be connected to 2.6V If I want to operate the ADC, COMP, DAC with this reference voltage, please confirm?

please refer to 'General operating conditions' and 'Absolute maximum ratings' sections in the product datasheet. VREF+ minimum value is 2.4V.

Relevant documents and resources:

http://www.st.com/resource/en/errata_sheet/dm00047pdf

,

http://www.st.com/content/ccc/resource/technical/document/datasheet/f0/ac/ee/70/19/13/4f/56/DM000467pdf/files/DM000467pdf/jcr:content/translations/en.DM000467pdf

,

http://www.st.com/content/ccc/resource/technical/document/reference_manual/fa/06/c7/15/3b/2a/4c/f1/DM000415pdf/files/DM000415pdf/jcr:content/translations/en.DM000415pdf

,

http://www.st.com/resource/en/application_note/cd001675pdf

,

http://www.st.com/content/ccc/resource/technical/document/application_note/31/14/f4/9d/d3/8f/48/2b/DM00070pdf/files/DM00070pdf/jcr:content/translations/en.DM00070pdf

,

http://www.st.com/content/st_com/en/products/embedded-software/mcus-embedded-software/stm32-embedded-software/stm32cube-embedded-software/stm32cubef3.html

.

-Amel

[Uwe Bonnes]

Posted on October 24, 2017 at 19:01

Why F373? The SDADC is a PITA. Beside the SDADC, the F373 has nothing to offer that you do not find on F303 or even better L4xx.  Subsitute the SDADC with decimating normal ADC values.

[PK K]

Posted on October 25, 2017 at 12:53

Hi Amel,

Thanks for the good support and valuable suggestions.

Please provide elaborate more on the below points:

1. What is meant by boot from Flash memory. Otherwise, boot from System

memory or SRAM ?

2. Why Bootloader_BOOT0 is managed by pin 6 of connector CN12 (RS-232 DSR

signal) in the EVM. Please provide more information? this is a specific

configuration in the STM32373C-EVAL evaluation board, while the default

setting is that Boot0-related jumper isn't fitted (as specified in UM1564).

3. What is DFU usage. Will 8MHz used to operate the USB port as device mode?

Thanks

Pench

On Tue, Oct 24, 2017 at 10:35 PM, Amel N <st-microelectronics@jiveon.com>

[Tesla DeLorean]

Posted on October 25, 2017 at 13:24

FLASH = Your application code

SYSTEM (ROM) = Factory Loader

RAM BOOT = Debugger or specialized execution 

DFU = USB base firmware update method