STM32F3 NRST pin slowly pulls low

[Bence Péceli]

Posted on May 01, 2018 at 07:34

Hello, I have an STM32F3 built into an application. I managed to upload a very simple code and run it, but something weird is happening. After about 20-30 seconds the mcu turns off. I measured the voltage at the NRST pin and after powering the device it slowly starts to decrease. After about 20-30 seconds it reaches 1.3-1.5 V and the mcu turns off. It keeps decreasing and stops at about 0.8-0.9 V. I desoldered most components, including the reset button, hoping one of them was faulty, but it didnt help. Now this part of the circuit consists of only the mcu NRST pin and a pull up resistor (10k). What could cause such a problem? Thank you in advance

[Travis Travelstead]

Posted on May 24, 2018 at 20:10

I have seen similar issues with some of my boards, maybe 1/20, where the NRST pin would slowly fall below the logic level. This could happens between hours and days, but after it crossed the threshold it would be hard to reset unless allowed to 'rest' and then shorting it to the 3.3v rail. So it would seem it essentially latches and has to be pulled up hard during the worst of it.

I had a 100k external pull-up to help the 40k internal pull up, but on the boards that had this issue I would need to reduce that to 10k just to get the NRST pin to float above the logic threshold, usually about 1.7v. 

This is a prototype run of boards so I am guessing that is the cause or exaggerating the issue, but it seems a little too suspicious for me to just think it is assembly.

My thinking is there is leakage through the internal reset transistor, or one of the several reset controls of that transistor is partially active, is causing enough pull down to counter the 40k pull up. From what I have seen in a couple cases it would seem like it is acting like a 10-15k pull down. 

I am used to putting pull-ups on the NRST line, but it seems like ST does not explicitly recommend it, so I hesitate to just assume. This combined with other forum post I have found while researching the issue, that there seems to be this concern about a pull-up could effect the reset timing and cause other issues. 

So one of my questions to add to this, is having a 5-10k resistor pulling up the NRST pin a bad thing? I hate the idea of band-aid solution, but I feel like I have looked and looked and find nothing obviously wrong, which I know are dangerous words. 

[Tesla DeLorean]

Posted on May 24, 2018 at 21:58

Same F3 part? Please be explicit about the part/pin count

Something else driving NRST externally?

AVDD supply voltage?

Driving externally is an issue, especially if a PP driver is used. The pull up is optional, the part has an internal pullup.

Other devices sharing common NRST?

Internal POR depends on VDDA

People who have slow rising supplies, and BOOT0 isn't pulled low, can get unpredictable startup, ie ROM vs FLASH

[Travis Travelstead]

Posted on May 25, 2018 at 05:15

Hello Clive,

Thanks for the quick response. I also apologize for not being clearer.

I am using the STM32F405RG which is a 64 pin

In my case, I have no other devices connected to the NRST pin, and I do not use a JTAG or SWD debugger that would take control of the NRST line.

Because the device works for a period of time before it has the issue, I would assume it is not a BOOT0 problem or slow rising power supply (which is possible with my DC/DC converter). 

This is where I think it is strange, that the issue is not at boot, which would make more sense. 

[Tesla DeLorean]

Posted on May 25, 2018 at 18:23

F4 part would review VCAPs and voltage there.

Islands of power or ground not connected?

[Travis Travelstead]

Posted on May 26, 2018 at 23:33

Hello Clive,

Thanks again for helping. I reviewed the VCAPs before, I think a suggestion of yours I found in related posts, and I did not find anything unusual there. 

I got a response back from ST's tech support and they said that at least in the case of the STM32F405RG chip that I am using that 10k pull-up is acceptable. But he also suggested that if the NRST pin is 'exposed' to the world that it could easily be ESD damage to the pull down transistor causing leakage issues.

This would make sense to me and I plan to make sure I have a series resistor and TVS diode setup for better ESD protection. This would make sense why this would be a common issue as well since the reset line can be easily exposed to physical touching or other objects that could make damaging with ESD easy. 

Not overly conclusive, but it does make sense. 

[T J]

Posted on May 27, 2018 at 02:09

Can you try another board ? this will prove if the first chip has ESD issues.

How did you manufacture this board ?

Its always nice to see, but not necessary, Can you send a pic ?

[T J]

Posted on May 28, 2018 at 04:13

on dry days, I water the carpet in the workshop.

[Travis Travelstead]

Posted on May 28, 2018 at 02:42

Hello,

I have built more than one, and see it in the range of 5-10% of my boards. I am reasonably careful with my assembly with ESD precautions, but they were built during the winter which adds extra ESD issues (dry air, more clothes), so it is also not overly surprising it might be the cause. I also think that that input might also be a little on the sensitive side.

My thinking is that I should add ESD protection to the components that are touch or get near being touched by humans during use.

[waclawek.jan]

Posted on May 29, 2018 at 00:28

Can you please do a couple of experiments with know failing boards?

- program one to a trivial loopdelay blinky running out of the default clock (HSI), the simplest concievable program which 'does something'  and observe if it will fail.

- one one of them remove the power source (regulator) and power it from a known good source (lab power supply, or connect short traces from a different board with known good power supply). Observe if it will fail.

- one one of them, try to replace *all* capacitors for different types, and observe if it will fail.

Also, please describe the power pins connections, including VDDA/VSSA and VBAT.

JW