STM32f2xx could not work with maximum frequency

[khodaarahmi]

Posted on July 03, 2013 at 13:27

I'm using default configuration (according to UM1061, RCC section) to configure an SMT32F215RG to work with 120MHZ CPU clock.

here is my configurations: /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */ #define PLL_M 25 /* For HSE value equal to 25 MHz */ #define PLL_N 240 /* SYSCLK = PLL_VCO / PLL_P */ #define PLL_P 2 /* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */ #define PLL_Q 5 /* In this example: PLL_VCO = 240 MHz SYSCLK = 120 MHz */ /***************************************************************/ /* PLL (clocked by HSE) used as System clock(SYSCLK) source */ /***************************************************************/ __IO uint32_t StartUpCounter = 0, HSEStartUpStatus = 0; /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Flash 3 wait state, prefetch buffer and cache ON */ FLASH_SetLatency(FLASH_Latency_3); FLASH_PrefetchBufferCmd(ENABLE); FLASH_InstructionCacheCmd(ENABLE); FLASH_DataCacheCmd(ENABLE); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK/2 */ RCC_PCLK2Config(RCC_HCLK_Div2); /* PCLK1 = HCLK/4 */ RCC_PCLK1Config(RCC_HCLK_Div4); /* Configure the main PLL clock to 120 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE, PLL_M, PLL_N, PLL_P, PLL_Q); /* Enable the main PLL */ RCC_PLLCmd(ENABLE); /* Wait till the main PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select the main PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till the main PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != RCC_CFGR_SWS_PLL) {} } else { /* If HSE fails to start-up, user can add here some code to deal with this error */ } for testing that, I'm using a blinking LED (in pooling mode), VDD is 3.3 volts & I use a 25 MHZ quartz. The problem is here that the program does NOT work at all or it begins to work & stops after one or two seconds. I used a debugger to trace it & I found that a Hard Fault occures & execution enters into HardFault_Handler infinity loop of startup_stm32fxx.s I checked the board several times & I'm sure it has no issue, also the same program works fine when I decrease cpu clock to a lower value (by changing PLL params, e.g set PLL_P=4). Seems all frequencies above 100MHZ causes some kind of problem. I guessed it may related to Flash access latency, but according to the datasheet with 3.3V of VDD it must works with 3 wait states & changing wait cycles did not helped me.

[Tesla DeLorean]

Posted on July 03, 2013 at 14:22

That doesn't look like the code provided in the 1.1.0 firmware library.

http://www.st.com/web/en/catalog/tools/PF257898

Use that code, and examples there in for system_stm32f2xx.c SystemInit() and SetSysClock(). If it still fails you need to pay some attention to your board. Check voltages and capacitors on VCAP pins

[Tesla DeLorean]

Posted on July 03, 2013 at 14:39

Material similar post from the other day [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/STM32f2xx%20HSI%20configuration%20does%20not%20work%20correctly&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&TopicsView=https%3a//my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/AllItems.aspx&currentviews=33]https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex_mx_stm32%2fSTM32f2xx%20HSI%20configuration%20does%20not%20work%20correctly&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&TopicsView=https%3A%2F%2Fmy.st.com%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2Fcortex_mx_stm32%2FAllItems.aspx¤tviews=33

If the chip isn't working at higher speeds then you're going to want to seriously review the board and the connections. Perhaps you might also want to test on a third-party board, with known/demonstrable function.

[khodaarahmi]

Posted on July 06, 2013 at 15:57

I forgot to put capacitor on VCAP & this causes the issue. Putting a 2.2UF capacitor solved the problem.