STM32F103ZD FSMC_MemoryDataWidth_16b writes 32 bits instead of 16

orcunorcun · ‎2015-09-10

Posted on September 10, 2015 at 15:31

Hello,

I'm using a STM32F103ZD in my project to communicate with a SRAM FPGA which has a datawidth of 16 bits. When the STM32 writes or reads from FPGA, it reads 16 bits of data, let's say 0x05 but while debugging, I see in FSMC memory (0x60000000) 00050005 instead of 00000005. So it reads 2x16 bits of the same data. FPGA cant be the problem because it works with another Arm A9 processor(which has a parallel bus interface similar to but other than FSMC). I checked all pin configurations and they are correct. Here is how I initialize FSMC and write into it:

FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;

FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = 0x03;

FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0x0F;

FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = 0x04;

FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_A;

FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0; // Only used with NOR Flash

FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0; // Not used for Nor or SRAM

FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0; // Don't care with Nor or SRAM

FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;

FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;

FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;

FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; // Only valid for flash memory in burst mode (just default)

FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; // Only valid for burst memories (just default)

FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; // Only valid for flash memory in burst mode (just default)

FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

// Enable FSMC Bank1_SRAM Bank

FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);

I have a struct called FSMC_STRUCT and it has a lot of 16bit arrays in it to make understanding address offsets easier. FSMC_NOR_BANK1 = 0x60000000

FSMC_STRUCT* fsmc_pointer = ((FSMC_STRUCT*)FSMC_NOR_BANK1);

fsmc_pointer->structx[0] = 0x01 for example writes a 0x01 into the address of structx[0] which is 0x60000000 BUT also into adress of structx[1] which is 0x60000002. And if I write something in structx[1], it will also be written in the address of structx[0] in FSMC.

so in debug the addresses 0x60000000 and 0x60000002 hold 0x00010001 but I only wrote in one of them. What could be the cause of this problem? Thank you very much in advance

#stm32f103-fsm-stm32

waclawek.jan · ‎2015-09-10

Posted on September 10, 2015 at 22:25

From RM0008:

HADDR[25:0] contain the external memory address. Since HADDR is a byte address

whereas the memory is addressed in words, the address actually issued to the memory

varies according to the memory data width, as shown in the following table.

[

Memory width -- Data address issued to the memory

16 bit -- HADDR[25:1] >> 1

]

.

In case of a 16-bit external memory width, the FSMC will internally use HADDR[25:1] to generate the address for external memory FSMC_A[24:0]. Whatever the external memory width (16-bit or 8-bit), FSMC_A[0] should be connected to external memory

address A[0].

-----

Did you connect FSMC_NBL0 to your FPGA?

JW

orcunorcun · ‎2015-09-11

Posted on September 11, 2015 at 13:03

Yes FSMC_NBL0 and 1 are connected to FPGA. All connections are correct. However The FPGA side doesn't use Byte Select. But we checked the data and adress sent from the master(STM32) to FPGA and it is correct. Only the STM32 somehow copies the data and overwrites the adjacent 16bits too whenever it writes to the 16 bit of a 32bit word

orcunorcun · ‎2015-09-11

Posted on September 11, 2015 at 13:31

Found the problem. FPGA had only 8 address bit pins instead of 9. Thank you