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STM32F103VBT6 debugging problem

Posted on August 03, 2016 at 11:45

Hello there,

Recently I developed a PCB board containing the STM32F103VBT6 MCU. Recently, I was using STM32F4 devices without any problems. For this device however, I am unable to debug my target using Segger's J-Link. The device itself is seen correctly by J-Link commander:

SEGGER J-Link Commander V4.96 ('?' for help)
Compiled Dec 22 2014 09:51:58
DLL version V4.96, compiled Dec 22 2014 09:51:48
Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46
Hardware: V8.00
S/N: 268004467
OEM: SEGGER-EDU
Feature(s): FlashBP, GDB
VTarget = 3.274V
Info: TotalIRLen = 9, IRPrint = 0x0011
Info: Found Cortex-M3 r1p1, Little endian.
Info: FPUnit: 6 code (BP) slots and 2 literal slots
Info: TPIU fitted.
Found 2 JTAG devices, Total IRLen = 9:
#0 Id: 0x3BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
#1 Id: 0x16410041, IRLen: 05, IRPrint: 0x1, STM32 Boundary Scan
Cortex-M3 identified.
Target interface speed: 100 kHz
J-Link>

I am using eclipse and with arm gnu eclipse plugin for development. When I start to debug the chip, I notice that the erasing and loading part takes really long (a lot longer than when working with F4). Then I am stuck at the first line of the assembly startup code, the mcu is being reset all the time and stops on that line:

/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0 // <---------------- STUCK HERE
b LoopCopyDataInit

Jlink console message when resuming:

Program received signal SIGTRAP, Trace/breakpoint trap.
Reset_Handler () at ../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s:82
82 

I have a lso an evaluation board available with the STM32F103VBT6 chip (

https://kamami.pl/zestawy-uruchomieniowe-stm32/185501-zl40arm-minikomputer-z-mikrokontrolerem-stm32fhtml?search_query=STM32F103VBT6+&results=5

http://kamami.pl/dl/zl40arm.pdf

For this board I also cant debug, but at least the program counter goes further- it locks at clock configuration (I tried internal, external both dont work). I find it really hard to figure out whats going on. The problem occurs both for JTAG and SWD protocols. I would appreciate all help.
3 REPLIES 3
Posted on August 03, 2016 at 14:34

I'd recommend using drivers from 2016 so as not to deal with issues that have already been resolved.

Make sure you don't use Flash Breakpoints, and that you've flush all others. Not an Eclipse/GDB user, check what options/scripts you have pertaining to the part, and if it is trying to breakpoint the reset entry point to gain control of the part.

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Posted on August 03, 2016 at 14:44

I have a newer version as well, this time it doesnt even start to download the target code. It asks me before programming either I want to unlock the chip, I click yes.

SEGGER J-Link GDB Server V5.12h Command Line Version
JLinkARM.dll V5.12h (DLL compiled Jun 29 2016 17:47:05)
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2331
SWO raw output listening port: 2332
Terminal I/O port: 2333
Accept remote connection: localhost only
Generate logfile: off
Verify download: on
Init regs on start: on
Silent mode: off
Single run mode: on
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: none
J-Link settings file: none
------Target related settings------
Target device: STM32F407VG
Target interface: JTAG
Target interface speed: 1000kHz
Target endian: little
Connecting to J-Link...
J-Link is connected.
Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46
Hardware: V8.00
S/N: 268004467
OEM: SEGGER-EDU
Feature(s): FlashBP, GDB
Checking target voltage...
Target voltage: 3.29 V
Listening on TCP/IP port 2331
Connecting to target...WARNING: Identified core does not match configuration. (Found: Cortex-M3, Configured: Cortex-M4)
J-Link found 2 JTAG devices, Total IRLen = 9
JTAG ID: 0x3BA00477 (Cortex-M3)
Connected to target
Waiting for GDB connection...Connected to 0.0.1
Reading all registers
Read 4 bytes @ address 0x00000000 (Data = 0x20005000)
Read 2 bytes @ address 0x00000000 (Data = 0x5000)
Target interface speed set to 1000 kHz
Resetting target
Halting target CPU...
...Target halted (PC = 0x080001B0)
R0 = 00000000, R1 = A5A5A5A5, R2 = A5A5A5A5, R3 = 20000110
R4 = A5A5A5A5, R5 = A5A5A5A5, R6 = A5A5A5A5, R7 = 200005B8
R8 = A5A5A5A5, R9 = A5A5A5A5, R10= A5A5A5A5, R11= A5A5A5A5
R12= A5A5A5A5, R13= 20005000, MSP= 20005000, PSP= 200005B8
R14(LR) = FFFFFFFF, R15(PC) = 080001B0
XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000
CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00
Reading all registers
Read 4 bytes @ address 0x080001B0 (Data = 0xE0032100)
Read 2 bytes @ address 0x080001B0 (Data = 0x2100)
Select auto target interface speed (4000 kHz)
Flash breakpoints enabled
Semi-hosting enabled (Handle on BKPT)
Semihosting I/O set to TELNET Client
Read 4 bytes @ address 0x080001B0 (Data = 0xE0032100)
Downloading 268 bytes @ address 0x08000000 - Verified OK
Downloading 4096 bytes @ address 0x0800010C - Verified OK
Downloading 4096 bytes @ address 0x0800110C - Verified OK
Downloading 4096 bytes @ address 0x0800210C - Verified OK
Downloading 4096 bytes @ address 0x0800310C - Verified OK
Downloading 4096 bytes @ address 0x0800410C - Verified OK
Downloading 4096 bytes @ address 0x0800510C - Verified OK
Downloading 4096 bytes @ address 0x0800610C - Verified OK
Downloading 1584 bytes @ address 0x0800710C - Verified OK
Downloading 684 bytes @ address 0x0800773C - Verified OK
Downloading 4 bytes @ address 0x080079E8 - Verified OK
Downloading 4 bytes @ address 0x080079EC - Verified OK
Downloading 8 bytes @ address 0x080079F0 - Verified OK
Read 4 bytes @ address 0x080001B0 (Data = 0xE0032100)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
Read 2 bytes @ address 0x08007018 (Data = 0xF000)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
Read 2 bytes @ address 0x08007004 (Data = 0xF7FF)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
Read 2 bytes @ address 0x08006FF4 (Data = 0xF7F9)
ERROR: Failed to prepare RAMCode using RAM
R0 = 20000654, R1 = 40023C00, R2 = 00001F07, R3 = 00000850
R4 = 200006D4, R5 = 20000674, R6 = 200006AC, R7 = 2000060C
R8 = A5A5A5A5, R9 = A5A5A5A5, R10= A5A5A5A5, R11= A5A5A5A5
R12= A5A5A5A5, R13= 2000060C, MSP= 2000060C, PSP= 200005B8
R14(LR) = FFFFFFF9, R15(PC) = 080072F0
XPSR 01000003, APSR 00000000, EPSR 01000000, IPSR 00000003
CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00
Reading all registers
Read 4 bytes @ address 0x080072F0 (Data = 0xBF00E7FE)
Setting breakpoint @ address 0x08006FF4, Size = 2, BPHandle = 0x0001
Setting breakpoint @ address 0x08007004, Size = 2, BPHandle = 0x0002
Setting breakpoint @ address 0x08007018, Size = 2, BPHandle = 0x0003
Starting target CPU...

As for you second suggestion, I dont see the option anywhere in the JLINK debug configuration. Where is it normally in your IDE? EDIT: Found the problem...

Connecting to target...WARNING: Identified core does not match configuration. (Found: Cortex-M3, Configured: Cortex-M4)

Forgot to manually change device name in debug config. Thank you for help.
Posted on August 03, 2016 at 15:14

GDB/OpenOCD typically has ''configuration scripts'', looks like you found yours.

My recollection is it defines the part# or id#, and can poke specific registers, etc to bring the system up. A lot more manual than Keil or IAR where the magic is handled within the DLL or CPU support databases transparently.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..