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STM32F100 value line TIM15/16/17 SFR

Posted on July 09, 2010 at 09:09

STM32F100 value line TIM15/16/17 SFR

6 REPLIES 6
swhite2
Associate III
Posted on May 17, 2011 at 13:58

I have a board (our custom hardware) with a STM32F100C6T6B on it. Its running (my) firmware that has exception detection and handling in it.

I just added the following code to see if I could reproduce your issue.

temp = TIM15 -> CR1;

temp = TIM16 -> CR1;

temp = TIM17 -> CR1;

The above ran without issue (no fault generated).

Are you sure you have a Value Line (F100) device? Timers 15-17 don't exist in other families.

Posted on May 17, 2011 at 13:58

Thank you for testing that.

I am sure that it is a STM32F100 derivate and not F101 or F103.

Could it be, that this controller has a defect memory region? Maybe i will solder another one on the board.

First I will have a look for possible software issues.

swhite2
Associate III
Posted on May 17, 2011 at 13:58

Do you have alpha or beta version silicon (I know we had beta stuff)? The STM32F100 is quite new so its possible you have buggy chips.

Posted on May 17, 2011 at 13:58

I changed the processor and now it works. Seems that some of the processors memory was defectous. This looks very strange to me. I never have seen something like this before. How is it possible that some (only a few) memory regions can be defectous?

I don't know if i have beta-chips. I have 5 and 5 samples and assume that they are from different production lots. The last 5 from package marking are: MYS 018 and MYS 940.

swhite2
Associate III
Posted on May 17, 2011 at 13:58

The STM32F100C6T6B I'm using is marked

9903N VC

MYS 009

Z

I don't see anything listed in the

http://www.st.com/stonline/products/literature/es/16939.pdf

(which is for rev Z which is what I have) but there is timer (1-5) issues listed in there.

Posted on May 17, 2011 at 13:58

I checked two further controllers with MYS 940 production lot. They also showed the problem when accessnig the MCU-registers of Timer 15 to 17.

Seems that i have received defectous chips.