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STM32F1 I2C start failure

clark2
Associate II
Posted on February 16, 2016 at 15:57

I am working with an STM32F103RC and trying to develop an I2C master application.  Currently the I2C bus is populated with only this master and an MCP23017 slave.

In my most recent test run the program eventually ended up in a locked loop waiting for SB to set in SR1.  The START bit is set, PE is set, the peripheral clock is enabled, both signals are in the passive state... how is this possible?  Is there a known (yet unpublished) bug in this peripheral which would allow this condition?  The obvious answer is ''yes'' unless I'm missing something.

I realize the prudent thing to do would be to have a timeout test on this wait, but why?

30 REPLIES 30
clark2
Associate II
Posted on February 29, 2016 at 13:46

Guess I didn't fix it after all.  It happened again...