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STM32F07 Timer max. external clock

Katagia
Associate II

Hi

I want to use a STM32F072 (max. 48MHz) to monitor an external clock.
The external clock has a frequency of 38.4MHz.
My idea is to use timer TIM3 (32bit) as counter and use the external clock as clock source (external clock mode 1).

I read the datasheet. My problem is I didn't find the information I need.
Chapter 6.3.14 I/O port characteristics shows maximum output frequencies. For OSPEEDRy[1:0] this is 50MHz. But what is the maximum frequency when the GPIO is used as input?
Chapter 6.3.21 Timer characteristics shows for f_EXT a typical freuency of 24MHz but what is the maximum allowed frequency? As the timer runs as counter with an external clock, the internal clock should not affect the timer as long as the timer itself is able to handle the frequency.

So my question is: "Where can I find information about the maximum frequency of TIM3 in external clock mode 1?"

Thank you very much.

2 REPLIES 2
PGump.1
Senior III

Hi,

I read "fTIMxCLK/2" means that the EXT clock is to be resampled by TIMxCLK to maintain the 'system wide' Timer synchronicity.

If you want 38.4MHz then you'll need to have minimum TIMxCLK of 2 x 38.4MHz.

However, if you understand Sampling Theorem, you'll understand about frequency folding - you maybe able to use it to your advantage...

Kind regards
Pedro

AI = Artificial Intelligence, NI = No Intelligence, RI = Real Intelligence.
Katagia
Associate II

Hello Pedro

Thank you very much for your response. I guess your're right. In the reference manual rm0091, figure 132 shows an example for external clock. There is a block "edge detector". When this runs with system clock, the maximum allowed external clock would be system clock /2.

I wonder how this would work with external clock mode 2 as there is a prescaler and no edge detector.

External trigger signal ETRP frequency must be at most 1/4 of CK_INT frequency. A prescaler
can be enabled to reduce ETRP frequency. It is useful when inputting fast external clocks.

It is possible to set the prescaler to /8. This would result in a frequency of 38.4MHz/8=4.8MHz which is smaller than 48MHz/4=12MHz. Do I miss something or could it work that way?


Thank you for the idea about the folding. You are right, as sample frequency and external clock are known it's possible to calculate the measured frequency. I have to think about it. In this context I'm more used to sine signals than rectangular signals.

Best regards,

Tilo