2011-10-01 12:35 PM
I closed the old thread for this lcd so that others my search for this thread more easily in the future.
okay, so i have a ST32F103VET6 and a ili9325 based lcd im trying to control using FSMC. the code compiles and i did debug but the signals are doing nothing when read with a multimeter (CS and DB0 tested so far) im not sure what im doing wrong can someone look at my code and see why i cant get the FSMC to actually send the signals?http://code.google.com/p/stm32103vet6-ili9325/downloads/list
2011-10-01 01:54 PM
tested wr line and nothing is happening. the polarity is actually reversed after the lines are configured. is that normal? is there a resource out there to learn more about how to use the FSMC?
2011-10-01 05:04 PM
since it looks like no one is going to help im going to continue to document this so that this might help someone else!
anyways... found two issues in the lcd.c file. FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); // was set to sram4 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; //was sram4 still not working...ill update as progress is made.2011-10-01 05:32 PM
since it looks like no one is going to help
You're assuming that anyone here is invested in solving your problem. If your not using Bank 1, Region 4, you should understand better what this line is doing. #define LCD_BASE ((u32)(0x60000000 | 0x0C000000)) Isn't Bank 1, Region 1 situated at 0x60000000 ? Using a multimeter to probe signals transitioning in the nanosecond realm is probably folly, you need to look at them with an oscilloscope. The write is reversed compared to what? Normally writes and chip selects are active low.http://code.google.com/p/stm32103vet6-ili9325/downloads/list
2011-10-01 05:54 PM
i forgot to mention i changed the LCD BASE.
#define LCD_BASE ((u32)0x60000000). code still looks fine in the debugger. ive been watching the FSMC register and bank one is the only bank gettin some action. im not so sure its the board anymore. im about to connect another lcd fresh from the package. even in serial wire debug i wouldnt be able to pick up a transition if im stepping instruction by instruction?2011-10-02 12:51 AM
The FSMC address for LCD register access looks wrong. Writing to a register involves sending data to the LCD with the RS line set high. This is done by attaching RS to one of the FSMC address lines.
Find out which line you have connnected RS to and calculate the appropriate FSMC address as an offset from0x60000000. For example, in my implementation RS is connected to A16 giving an FSMC access address of 0x60020000 (0x6000000 + 2**17). Data access (and register parameter access) to the LCD is done with RS low giving an FSMC address of 0x60000000.Another thing you'll need to tweak is the address setup and data setup parameters to the FSMC. Too short and it won't work. Too long and it'll be slow. These parameters are panel dependent - not driver dependent.2011-10-04 07:34 AM
2011-10-04 07:53 AM
I think Andy's point is that it will depend on how you have the panel wired to the bus, and what panel you are utilizing. Details currently absent from the thread.
The trick with RS he mentions comes from the fact that you have an address bus which is driven by your access to the 0x60000000..0x63FFFFFF region, higher order Axx bits will be driven by accesses to higher address ranges. External address bus pin A16 on a 16-bit data bus (D0..15), is address bit 17 (ie 1 << 17) in 8-bit space as the STM32 implicitly shifts/aligns the external address bus depending on the access width. For debugging you could presumable read register/memory values and print them to the serial port, or create some global variables/arrays and put data there. With the latter you could place a JTAG debugger memory view window over the memory region and watch it change in real-time.http://code.google.com/p/stm32103vet6-ili9325/downloads/list
2011-10-05 12:07 AM
thankyou clive1 for your reply and explanation.
i was able to find the panel datasheet.i tried to do the calculations in the application notes for the fsmc and my math is not checking out. for this panel:datast: 10nsaddst: 10ns write 5ns readaddht: 5ns((ADDSET + 1) + (DATAST + 1)) × HCLK =100((10+1)+(10+1)) x 72 mhz ≠ 100DATAST × HCLK = tWRLW10ns x 72 ≠ 50what am i missing here?2011-10-05 02:29 AM
Have you see the Application Notes
They emphasise the importance of delays at initialisation. Sorry I can't help with detailed configuration for your particular panel.