STM32 ADC: Multiple channels with different sampling rates

[patrickbrataas9]

Posted on October 23, 2014 at 10:51

I am trying to figure out how the STM32 multiple channels ADC conversion works (regular group). Lets say I want to convert on two channels, channel 1 and channel 2, on ADC1 and the sampling rates are 1 Hz and 10 Hz respectively (not actual numbers). I enable the setting to get an ADC EOC interrupt on each conversion (EOCS bit), which mean for each converted value the ISR is triggered and run.

I assume for the given sampling rates that the ISR will be triggered once every second for channel 1 and ten times every second for channel 2.

In the ISR, do I have to keep a track on which channel triggered the ISR or is there some register i can check that contains this information? How is this usually done?

If I were to use the DMA, how would the data be arranged? Would it be an array where every 11th value would be the channel 1 data and the rest channel 2 data? #injected #adc-scan-continuous #adc #adc #over-engineering #timer #dma #adc-sampling-rate

[Tesla DeLorean]

Posted on October 23, 2014 at 14:36

Can you use two ADC? ADC1 and ADC2. Or use injection?

[patrickbrataas9]

Posted on October 23, 2014 at 16:07

I am working on a very utilized MCU, the other ADCs are busy and I also only have 1-3 timers left so I want to try solve this using the explained method. The samplingrate will be rater slow on this ADC, maximum 5 kHz.

[Tesla DeLorean]

Posted on October 23, 2014 at 16:53

I want to try solve this using the explained method.

What if that's not an effective method? Sample both at 10 Hz, and throw away the nine samples you don't want to use. Otherwise you're going to have to dance around reconfiguring things.

[patrickbrataas9]

Posted on October 24, 2014 at 10:45

I should have formulated my words better and said: ''I want to investigate the feasibility of the purposed method''.

From your last post I understand this method is not optimal. After another look on how I can arrange the measurements done on the ADC I think I found a solution.I have some uncertainties and therefore I have some questions.Lets say I use TIM4 (STM32F429II) and use the channels like this:CH4 -> Regular Group on ADC1CH1 -> Injected Group on ADC1CH2 -> Injected Group on ADC2CH3 -> Injected Group on ADC3The measurements triggered by CH4 is of low priority and not critical if not sampled on time.The measurements on CH1, CH2 and CH3 is of high priority and have to be sampled without any unnecessary delay as it would decrease the accuracy of the measurements.The sampling rates on CH1, CH2 and CH3 is not the same and they are all variable and this is the reason I use them on different ADCs and in injected group mode.Questions:1. Is there any problem using the same timer as trigger for all of these? The measurements has about the same sampling rate range (1-10 kHz) so the timer frequency can be constant and only the compare value register has to be changed to adjust the sampling frequency.2. I plan on using DMA on the regular group. Will the interruption of the regular conversions by the injected group cause any problems for the DMA? (I assume not as the regular and injected have separate data registers).3. If it is possible to use more than one injected group per ADC, how would they queue/be prioritized? (most out of curiosity)4. Does this sounds reasonable?

[frankmeyer9]

Posted on October 24, 2014 at 11:17

Wouldn't the method of dropping the surplus samples being the easiest to implement and test, having the least impact on code size and runtime, and being easily portable ?

[patrickbrataas9]

Posted on October 24, 2014 at 11:45

I agree. That is what I am doing now on the regular group, but I expanded the question a bit in the last post.