STM32 ADC limited common mode range

[Uwe Bonnes]

Hello,

for a switched capacitor ADC with differential inputs, I would expect no limits on common mode voltage as long as input voltage is in the GND/VDDA range. However STM32 ADCs only allow a small range of common mode voltage around (Vref- VDDa) /2. In some test circuit with common mode voltages outside that range I got (stable) values several percent off.

• Why has the STM32 ADC this requirements
• Is there characteristic data what happens outside the allowed range?

[Imen.D · Accepted solution]

Hello @Uwe Bonnes​ ,

STM32 ADC support only fully differential input signals (we do not support pseudo diff signals). This is by design.

It is forbidden to use the ADC outside of the specified VCM as the functional behavior is not guaranteed.

Hope this answer your question.

Imen

[LaoMa]

Hello @Imen DAHMEN ,

I have a similar and bigger issue....

In case I have to sample a signal on In+ biased at Vdda/2 (Vdda/2 is then connected to In-) I suppose I won't have any trouble .....

But in case I have to make a differential conversion of a signal coming out from a thermopile sensor, whose values can be positive up to 2.7 V and negative down to -300 mV (signals are scaled from 0 to 3000 mV). According to the reply above, it appears that I cannot use the +300 mV bias as the In- reference, can I?

All DS are showing the differential conversion like a big feature, but really it has this limitation that should be outlined in the 1st page in a way that the designers will know that since the beginning.... in my case, I have no big problem to compute the differential value by the code but I need 2 conversions instead than 1.... it is not a negligible detail, is it?

Thanks for your advises

Maurizio