SRAM parity error detection

matic · ‎2016-09-15

Posted on September 15, 2016 at 23:55

Hi.

I would like to enable parity error detection for SRAM in STM32F303. I know that this is done through programming option bytes.

But I don't know, how can I actually detect if parity error has occurred. If it happens, then SRAM_PEF flag in SYCFG->CFGR2 register is set. This one could be connect to TIM1 Break input interrupt, if SRAM_PARITY_LOCK in the same register is set. Does that mean, that TIM1 interrupt will occur? Or is there any other way how to detect parity error (without polling for the SRAM_PEF flag by software)?

Thank you

waclawek.jan · ‎2016-09-16

Posted on September 16, 2016 at 10:24

From Embedded SRAM / Parity check chapter of RM0316:

The parity bits are computed on data and address and stored when writing into the SRAM.

Then, they are automatically checked when reading. If one bit fails, an NMI is generated if

the SRAM parity check is enabled.

Thus, the easiest way to detect SRAM parity error is in the NMI ISR.

JW

matic · ‎2016-09-16

Posted on September 16, 2016 at 19:04

Thank you Jan. I read RM before, but don't know how I didn't notice that.