2025-06-11 2:14 AM
Hi,
it seems I have some general problem with the understanding of the SPI transmission with the STM32H5.
I have an SPI, configured as master for transmission only. Initialisation and stuff is done by CubeMX-generated code, but the transmission shall be done more or less "manually". Means: I want to send 3x 1 byte by writing them one after an other into the related TXDR register.
Now what I do NOT understand is, what flag do I have to wait for in order to see if a) I can write the next byte into the FIFO and b) see if all three bytes have been sent?
From my understanding:
a) can be achieved by waiting for the TXP-flag being set. As long as this is the case, I can write the next byte.
b) can be achieved by waiting for the TXC-flag being set. As soon as this is the case, all data have been transmitted.
However, there seems to be a dependency to the CR2-register. When I set it to 0,TXP appears once and then never again. When I set it to 3, TXC never appears.
So I can't find a situation where I can write data to the transmission register properly AND where I'm informed about the transmission being complete.
This all is done without any interrupts and without the blocking transmission-functions out of the HAL.
Can anybody sched some light on the behaviour of these flags?
Thanks!
Solved! Go to Solution.
2025-06-11 5:36 AM
If you have TSIZE = 0, then poll TXP to see if there's space available to write new data and poll TXC to see when the bus is idle and transmission is complete.
If you have issues with that, show the relevant code.
2025-06-11 5:36 AM
If you have TSIZE = 0, then poll TXP to see if there's space available to write new data and poll TXC to see when the bus is idle and transmission is complete.
If you have issues with that, show the relevant code.