spi speed configuration of STM32L

[vicki19880929]

Posted on March 04, 2014 at 00:42

Hi all,

I am playing with SPI examples of STM32L recently and would like to ask a simple question about the SPI clock rate.  When I read through the datasheet, it mentions APB1 and APB2 have maximal frequency of 32MHz. I know that we need to set the GPIOx_OSPEEDR for SCK/nSEL/MOSI pins in SPI master mode.  But in the description of GPIOx_OSPEEDR, it has four mode of 400k, 2M, 10M and 40MHz.  Why is the highest speed more than the maximal clock rate?If I set the prescaler to 2 (000) with 40MHz GPIOx_OSPEEDR, does it mean 20MHz SPI clock rate or 16MHz SPI clock rate?I may have some dummy misunderstandings between the term SPI speed and the clock rate of STM32L.  Could some one please help? Thanks a lot! ~S

[Tesla DeLorean]

Posted on March 04, 2014 at 01:07

Understand that GPIOx_OSPEEDR defines how aggressive the pin driver is slewing the pin high-to-low, low-to-high into a capacitive loading on the pin. Driven too aggressively the signal will under/over shoot, too little and the square wave (edge) will become more triangular (sloped).

The configuration of the pin driver is unrelated to the bus speed of the device, one should set the pin based on the expected signal speed being output, and the type of load it's being driven into.

[vicki19880929]

Posted on March 04, 2014 at 01:50Thanks clive!  That makes more sense to me now.  So to determine the SPI clock speed, the thing really matters would be the prescaler only.  :)

[Tesla DeLorean]

Posted on March 04, 2014 at 02:59

In master mode yes the bus clock and the prescaler/divider, for a slave the external source clock.