Posted on March 05, 2015 at 15:12In the typedef for struct SPI_InitTypeDef (in stm32f4xx_hal_spi.h) I find the comment regarding NSS:
''Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. This parameter can be a value of @ref SPI_Slave_Select_management''
Allowable values are:
&sharpdefine SPI_NSS_SOFT SPI_CR1_SSM
&sharpdefine SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
&sharpdefine SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
I'm trying to figure out what is meant by ''software using the SSI bit.'' I can find no API that seems to manage this and would not expect to be twiddling bits directly in the device registers at the same time everything else is done via library APIs.
Unless I missed something, it looks like selecting SPI_NSS_SOFT at initialization causes the code to just leave that GPIO unconfigured. That's what STM32CubeMX seems to show as well. I just configured it as a GPIO output and drive it low before starting a read/write and driving it back high when the I/O operation completes.
This seems to work, but it leaves me wondering if I am overlooking some functionality built into the SPI peripheral. Searching for SPI and NSS finds some interesting discussion about how NSS works (or not. ;) ) but nothing that clues me in WRT this detail.
I suppose if I could find the manual for the library, I might find the answer there. I thought I had a copy once but cannot now find it and it seems not to be searchable on the web site.
If I'm missing something here, feel free to clue me in!
Thanks!
#spi-nss-ssi-stm32cube
