2012-10-18 08:56 AM
Hi,
I'm having a bit of trouble configuring the SPI2 clock frequency on an STM32F407VG, or perhaps I am confused as to how it works.Using a 25Mhz external oscillator, boosting up to system clock frequency of 168MHz.AHB prescaler is 1, so the AHB clock is 168MHz.APB1 prescaler is 4, so the APB1 clock (PCLK1) should be 42MHz.I'm setting up the SPI2 peripheral with this bit of code: SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; SPI_InitStructure.SPI_Mode = SPI_Mode_Master; SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; SPI_InitStructure.SPI_CRCPolynomial = 7; SPI_Init(SPI2, &SPI_InitStructure);And then I am just sending a fixed byte: while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE)==RESET); SPI_I2S_SendData(SPI2, 0xA5);When I scope the SCLK output, I am seeing 8Mhz. I thought that the baud rate was supposed to be derived from PCLK1, so a prescaler of 2 should give me a rate of 21MHz.The clock setup was generated using the tool provided by STM.Anyone know what I might be doing wrong or if I am misunderstanding something?2012-10-18 09:33 AM
Anyone know what I might be doing wrong or if I am misunderstanding something?
Sounds more of an issue with the project, and that you're using the 16 MHz HSI which the chip starts off of. Suggest you output the clock(s) via the MCO pin(s) and confirm they are running as expected. Check the 25 MHz clock is starting. Check the settings in system_stm32f4xx.c has the right settings, and that your startup code is calling SystemInit()
2012-10-18 10:45 AM
Thanks Clive. I had a bad oscillator chip. It is interesting that the HSI clock seems to be taking over when the HSE is not present.
2012-10-19 08:09 AM
It is interesting that the HSI clock seems to be taking over when the HSE is not present.
Interesting? how about compltely logical