Hi, I'm using the STM32H7 family and have spent several days trying to get dual mode working correctly with the STM32H723. I finally switched to the STM32H753 so I could try the ADC_DualModeInterleaved example from the repository at STM32CubeH7/Projects/NUCLEO-H743ZI/Examples/ADC/ADC_DualModeInterleaved at master · STMicroelectronics/STM32CubeH7 · GitHub. It seems to work, but I need regular simultaneous mode instead.
In the code, I replaced the MultiModeInit.Mode =ADC_DUALMODE_INTERL statement with MultiModeInit.Mode = ADC_DUALMODE_REGSIMULT, and also reconfigured the ADC channels as follows:
//Original #define ADCx_CHANNELa ADC_CHANNEL_18
#define ADCx_CHANNELa ADC_CHANNEL_19 //New
//Original #define ADCx_CHANNELa_GPIO_PORT GPIOA
//Original #define ADCx_CHANNELa_PIN GPIO_PIN_4
#define ADCx_CHANNELa_GPIO_PORT GPIOA //New
#define ADCx_CHANNELa_PIN GPIO_PIN_5 //New
//Original #define ADCy_CHANNELa ADC_CHANNEL_18
#define ADCy_CHANNELa ADC_CHANNEL_3 //New
//Original #define ADCy_CHANNELa_GPIO_PORT GPIOA
//Original #define ADCy_CHANNELa_PIN GPIO_PIN_4
#define ADCy_CHANNELa_GPIO_PORT GPIOA //New
#define ADCy_CHANNELa_PIN GPIO_PIN_6 //New
However, I only get valid data from the master adc connected to PA5. The high order 16 bits in the common CDR register isn't identical to the low order 16 bits but tracks it very closely; if I connect PA6 (slave ADC) close to ground and PA5 (master ADC) to close to +3.3 V I get values in the CDR such as 0xFD55FD54, so it's acting as if it's still in interleaved mode.
The common CSR register reads 0x100B100B, and the CCR reads 0x0048006. ADC1 ISR is 0x000100B, IER is 0x00000010, CR is 0x1FC10205, CFGR is 0x8001483, and CFGR2 is 0. ADC2 is the same except that IER is 0 and CFGR is 0x80001003.
I've tried a few different things like using the timer vs software trigger, and changing the slave to continuous conversion mode, all to no avail. I've also gone over reference manual several times and still have no clue. Any tips would be greatly appreciated!
