2023-08-22 12:08 AM
Here i am trying to set PLL as the system clock using HSI of 16MHz for STM32F401RE development board, but the moment i enable the "SET PLL as system clock" bit, the system gets reset. What can be the reason for this. I am trying to achieve 70 MHz of frequency.
Below is the code for the same.
2023-08-23 04:16 AM
Yes if I try Cube MX than it is working fine but if I am using the same PLLM, PLLP and PLLN bits for 16MHz, the code is not working fine, the moment I run the code, it jumps out from the debugging mode. I don't understand what I am doing wrong.
2023-08-23 06:31 AM - edited 2023-08-23 06:39 AM
@DJ1 wrote:I have kept while loop until the HSIRDY and PLLRDY bits are SET to 1. Even after that the moment i run my code in debug mode, it comes out of debugging.
I asked if you are programming the appropriate wait states. I don't think this response answers that question, and I don't see you doing it in the code.
If you're not setting wait states, that explains why the code is crashing.
2023-08-23 06:33 AM - edited 2023-08-23 06:36 AM
As @TDK said above, you need to set FLASH waitstates first.
And you may need to set VOS in PWR, too.
Also check if all VSS/VDD pins are properly connected (including the analog ones), and also if there is a proper capacitor connected to VCAP pin(s).
JW