Serial decoder 4b5b

[Abderrezak]

Hello Dear Community,

I want to capture and decode a bitstream on STM32F746. The bit rate is 60ns/bit. Data is encoded using 4b5b and has a unique code for start of frame and no end of frame.

What I have tried so far, is to configure TIM2 (APB1 timer clock is 108MHz) with a prescalar of 0 and counter 1. Then, each time the interrupt is fired I sample the input data: Briefly, I try to implement an oversampling mechanism. This approach seems not working. I tried to toggle a pin in the same interrupt and the maximum frequency I get is 146.7KHz. Maybe it is not possible to fire a timer interrupt higher than this frequency (NVIC latency...).

How can I acquire my serial data efficiently? What will be the correct approach to implement my solution? I have seen some input capture using Timer/DMA and I am considering theme. Maybe some GPIO-DMA access?

One constraint I have is that the data rate might change from application to an other. Ideally, I would extract the clock from data stream using a PLL, I would do it easily using FPGA but we want to implement it on STM32.

[TDK]

One way to do this is to set up a timer in IC mode and capture the time between edges and postprocess to interpret 1s and 0s. At 16 MHz bit rate, it may be doable but barely.

Another way is to do determine the clock rate as above, then set up a new CLK signal (that resets on an edge) to act as SPI_SCK. Feed the data into SPO_MISO and read it as an SPI stream. Works well for any encoding which doesn't have a ton of consecutive 0s or 1s.

In any case, interrupts at every edge in a 16 MHz bitstream isn't at all viable.

[Tesla DeLorean]

DMA could be used to timestamp the edges into a longer pattern buffer, and thus decimate the interrupt loading, but long term it's probably not sustainable. Sampling GPIO with TIM+DMA would generate more data to digest.

An FPGA or CPLD, with enough buffering depth probably still a better choice so the F7 can do more useful work. The TIM's inputs can also be used as a make-shift DMA DRQ.

[Abderrezak]

do you think it is achievable to sample my data stream (60ns/bit) and treat them fast enough with STM32F7? There is no issue if some samples were lost. I would like to know only the approach to implement such application. Thank you

[Tesla DeLorean]

Well it's not our project.. you'll have to invest the effort to prototype and evaluate the efficacy of different approaches.

Does the F7 need to do anything with the data it receives? Save it to some storage medium? Do something transformative with it?

[TDK]

It is absolutely achievable to decode a stable ~18 MHz 4b5b bitstream and put that into memory, provided you're okay with samples at the start being lost. However, it will take a good deal of programming expertise and specific STM32 hardware knowledge to pull this off. The SPI method I spoke above works, I've done it. Work on recovering the clock, then treating things as SPI.

[Abderrezak]

Hi TDK, many thanks to your idea. I was thinking of this, but I have seen (on CubeMX) that data width must be less than 16bits. But I guess it should work since SPI could be also a continuous stream. I'll give it a try. It is so far the best approach I have now.

[TDK]

Word size doesn't really matter as you won't be able to ensure the first 5 bits you receive are part of the same 4-bit nibble. You'll have to check each byte to ensure it's a valid 4b5b pattern and if not, shift over a bit. Once synced, all future words will line up, barring communication issues.