SD ADC behaviour on STM32F373

samuel · ‎2015-11-12

Posted on November 13, 2015 at 04:41

Hello,

I am using STM32F373RBTx micro in my prototype board and have an unexplained behaviour that I observed during my bench testing, particularly around SD ADC operation.

2 things were observed:

1. unexplained square-wave like signal on the ADC pin (scoped on PB2 pin) like shown in the attached plot. This is with the Sigma Delta ADC sampling rate set to 0.24ms.

2. unexplained current sink on PB2 pin which is significantly bigger than other ADC pins. For some reason, it is sinking ~1uA on constant DC voltage where other ADC pins with similar circuit configuration are sinking significantly lower current (~0.02uA - 0.4uA). I can't see anything mentioned about the current sinking capability on the datasheet and the only unique thing I can find about PB2 pin is that it is shared between SDADC1 and SDADC2 AIN. The current sinking issue does not appear on an unprogrammed micro.

Both were observed with the SD ADC functioning.

The square-wave signal like issue might be related to the way the sampling was set to but it is intriguing that it affect the input signal although it is set to be an input pin.

Has anyone observed the same thing described above or any ideas on what causes the aforementioned behaviour?

Amel NASRI · ‎2015-11-17

Posted on November 17, 2015 at 14:42

Hi loho.samuel,

In order to understand the issue you are facing, I have some questions:

1- You mentioned the SDADC sampling rate (0.24ms). Does the behavior depend on the sampling rate?

2- What are the other pins you used for test? Are they also powered by VDDSD12 as PB2?

3- Are you respecting the powering constraints provided in the datasheet (''Absolute maximum ratings'' section)?

-Mayla-

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samuel · ‎2015-11-25

Posted on November 25, 2015 at 20:35

Hi Mayla,

Thanks for the reply.

To answer your questions:

1. We figured out the square wave like signal was the result of the ADC being turned On and Off. the amplitude of the square wave is dependent on the clock frequency chosen to operate the ADC.

2. The other pins that I measured were SDADC3 pins (PB14, PB15) and SAR ADC (PAx). All ADCs (VDD, VDDSD) are powered through the same 3.3V voltage.

3. As far as I can tell, the conditions are respected in the design (VDD= VDDA = VDDSD12 > VREF+ = VREFSD+).

Regards