2017-02-06 02:14 AM
RM0090 rev.13, 7.3.15 RCC APB2 peripheral clock enable register(RCC_APB2ENR), should be removed entirely - while ch.7 is for the '40x/41x, this subchapter contains RCC_APB2ENR for the '42x/'43x.
Note, that there *is* ch. 7.3.14 containing the proper RCC_APB2ENR register for STM32F405/415/407/417.
JW
Solved! Go to Solution.
2017-02-06 04:55 AM
Hello
Waclawek.Jan
,This is reported internally and will be fixed in the coming version of the reference manual.
Thanks a lot for your contribution tothe enhancement of our STM32 resources.
Khouloud.
2017-02-06 04:55 AM
Hello
Waclawek.Jan
,This is reported internally and will be fixed in the coming version of the reference manual.
Thanks a lot for your contribution tothe enhancement of our STM32 resources.
Khouloud.