Repetition of arbitrary waveform through DMA (Problem)

[YSall.1]

Hi,

I created a program that should create repetition on an arbitrary waveform through DMA burst feature. I use circular mode and I decide to stop it when the repetition are done. I use the transfer complet interrupt to increment a variable to have the repetition wanted.

My problem is that I get different results for a different magnitude. For example, when I set a PWM signal of 1s with a duty cycle of 50 %, the program is working. But when I used a signal of 200ns with a duty cycle of 50 % it's not working.

I use a nucleo F446RE and timer 2 (90 MHz)

Here is the picture of the 1s signal

Here is the picture of the 200ns signal, you can see the uncessecary repetition that make me think of delay of time execution in the interrupt routine (I should have had just one repetition)

Here is the code, for the initialisation counter =-1 and repetition =0 because I want 0 repetition

int counter=-1; //Initialization of counter
 
void DMA1_Stream1_IRQHandler(void)
{
	if (DMA1->LISR & LISR_TCIF1 ) //transfer complete interrupt flag
		{
			DMA1->LIFCR |= LIFCR_CTCIF1; // reset interrupt
 
			if (counter==repetition+1) // case for disabling signal
				{
 
				
				TIM2->CCER &=~ (1<<0); // I desactivate the output compare channel
				GPIOA->AFR[0] &=~AFR5_TIM; // I desactivate alternate function of PIN
				}
			   counter++;
 
}

Something that I found strange is that when I set counter=0, the 1s magnitude signal won't work, and when I set counter=0 for ns signal, there will be less unnecessary repetitions

Why is it doing that? Is there another way to generate repetition for arbitrary signal?

[waclawek.jan]

Which STM32?

200ns is too little time for ISR to execute even in the fastest mcu. Find some other way to stop the pulsetrain. The simplest and probably the best is to use non-circular DMA.

JW

[YSall.1]

I use a nucleo F446RE and timer 2 (90 MHZ clock) (45MHz bus)

[gregstm]

As JW said, I think you need to find another way to stop the pulse train - but in the mean time, I think you could pulse an io pin (efficiently using the BSRR register) within the interrupt routine (eg. set pin high at start and low at the end of the interrupt routine), then you can get a better idea of when the interrupt routine is occurring in relation to your pulse train.

[YSall.1]

Thanks for the advice