Regarding IWDG maximum timeout duration to reset in STM32F446RET6.

[AnnakkiliArumugam]

Hi!

    I have working on the watch Dog implementation in STM32F446RET6.The board which I have used is NUCLEO-F446RET6.

I have followed the below mentioned steps,

      1. Enabled the IWDG in system core using CubeMX of STM32CubeIDE. (which takes the LSI frequency for the IWDG as 32KHz in Clock Configuration.)

      2. In Parameters settings of IWDG, Set the Pre-scalar divider as 256 and the down counter reload value as 4095 which are the maximum values to produce the time out of 32.768 seconds as per the reference manual.

     I have theoretically calculated the duration using the formula,

                                        IWDG_Time= [(Reload Value+1)*(Pre-scalar value)]/ LSI frequency

                                                            =[(4095+1)*256]/32000

                                                            = 32.768 seconds

- I didn't refresh the watch dog timer anywhere. So, As per the program the system need to be reset in 32.768 seconds (approximately 33 secs). But in real case, the system got reset after the 39 seconds or in 40 secs. Why this delay of 7 - 8 seconds is taken for the system reset?

- Similarly, I have configured the Pre-scalar divider as 256 and the down counter reload value as 2249 which are the values to produce the time out of 18 seconds.

                                         IWDG_Time= [(Reload Value+1)*(Pre-scalar value)]/ LSI frequency

                                                            =[(2249+1)*256]/32000

                                                            = 18 seconds

-- In this case the system resets after the 22 seconds but not in 18 secs? Why?

I have attached the output screenshot for your reference.

Kindly, suggest the solution for this!

Thanks in Advance!!!

[AnnakkiliArumugam]

@Sarra.S

Thanks for the response!

I am working on that! Once I achieve the desired interval using this, I will acknowledge you about the results.:smiling_face_with_halo:

[Issamos]

After calculating the LSI frequency, you have to adjust the other parameters according to this LSI frequency to obtain your desired values.( take a look at the main.c line 103 to find an exemple in comment). The TIM5 will be just used to determine the LSI frequency. 

Best regards.

II

[Issamos]

Hello @Pavel A. 

The LSI oscillator cannot be calibrated, but can be measured to evaluate frequency deviations (due to temperature and voltage changes).

Best regards.

II

[AnnakkiliArumugam]

@Issamos 

Yeah! I have adjusted the prescalar & Reload value accordingly!! Thanks for the response!!!

I have achieved the defined timeout interval as I required!

Thanks for the support!!!

[AnnakkiliArumugam]

@Sarra.S 

I have achieved the defined timeout interval as I required!

Thanks for the reference!:smiling_face_with_halo:

[Peter BENSCH]

Hi @Pavel A. There is no dedicated application note for the STM32F4 family, but the AN4631 written for the STM32L0 mentions this:

37 kHz Low-Speed Internal (LSI) RC which is designed to drive the independent watchdog and optionally the Real Time Clock (RTC). The LSI oscillator cannot be calibrated, but can be measured to evaluate frequency deviations (due to temperature and voltage changes).

This essentially also applies to the STM32F4, even though the typical frequency of the LSI here is not 32kHz, but 37kHz.

Having said this, I would like to refer to the answer of @Sarra.S: here, too, the LSI is not calibrated in the actual sense, but before using the IWDG, the LSI is measured and the IWDG is then started with a corrected value. This can improve the tolerance of the timing somewhat, but it must also be taken into account here that the supply voltage and the component temperature have a non-negligible influence on large timeouts of the IWDG.