Refinement about DMA

[Roman K]

Posted on February 28, 2018 at 12:55

I have a few misunderstandings about DMA, so I need some help. 

I setup DMA to copy from GPIO IDR (without inc) to sram (with inc), it triggered from Timer (Free Running, Overflow event).

In the case of algorithm like following:

   1. DMA setup

   2. Timer Start

   3. Infinite Loop

   4. Breakpoint in DMA Interrupt handler

All works fine, program jumps into interrupt handler, the sram buffer is filled up with some data from IDR. But when I change an 

algorithm like that:

   1.

DMA setup

   2. Timer Start

   3.1. WFI (I'm using an assembler)

   3.2. Infinite Loop

   4.

Breakpoint in DMA Interrupt handler

The 

interrupt 

wakes core up, but the buffer is empty (not changed). DMA CNDTR register is 0 and there are no error flags. In Reference Manual I have this about WFI: 'CPU clock OFF, no effect on other clocks or analog clock sources', so, what did I miss? And how should I 'wait' for DMA interrupt without entering in checking loop?

Another

misunderstanding

: I want to read least significant byte of IDR, so, I setup PSIZE = 16bits (as it said in 

Reference Manual 'IDR 

can be accessed in Word mode only'), MSIZE = 8bits (like in

 Table 76 in 

Reference Manual). But sram is filled with halfwords anyway (doesn't matter what values of PSIZE (16bits/8bits) and MSIZE (16bits/8bits) are).

And some stupid misunderstanding

:

 why can't I use source address of DMA in peripheral bit-band region as peripheral (to read specified GPIO bit)?

[AVI-crak]

Posted on March 02, 2018 at 00:14

WFI refers to energy-saving modes. In this state, part of the periphery is turned off. Periphery is not reset, but the clock signal is removed. It can be controlled by the presence of a clock signal in a power saving mode, for this purpose there RCC registers.