RCC AFIO

[megahercas6]

Posted on November 11, 2011 at 21:58

Hello,

i am trying to connect 4,3' TFT lCD with SSD1963 controller, and hit one problem original driver was for STM32F103, and function sound like this: RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD  | RCC_APB2Periph_AFIO, ENABLE); but i was unable to find AFIO declaration in STM32F4xx_RCC library. all i did:  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | ENABLE); (it's same function, just name  a little bit different, but it do same thing) can some one tell how to fix this ?

[Tesla DeLorean]

Posted on November 12, 2011 at 01:53

Subsequent designs (L1's) moved the AFIO function within the SYSCFG module, on the F4's it's part of the GPIOx units themselves.

[megahercas6]

Posted on November 12, 2011 at 19:57

Maybe some on know how to make that code run on STM32F407 (it's from F103)

i try everything, even copy code from ADC3 example from dsp examples of stm32f4xx  folder witch has same function, but nothing, gpio dosen't still don't working (code is in the file)

[Tesla DeLorean]

Posted on November 12, 2011 at 21:17

Your problem might be better stated as using the FSMC bus for LCD connectivity.

You'll need to check that the FSMC bus is using the same pins as the F1xx version, but you'll definitely need to be using F4xx GPIO initialization model/API. You might want to look at the STM32F2xx_StdPeriph_Lib, I haven't seen a F4xx version yet, only the one bundled in Keil and the F4Discovery. Now presumably you want to set the FSMC bus up, and then use DMA to transfer the data cyclically to the LCD. This is cut from system_stm32f2xx.c, otherwise you're going to configure the pins to GPIO AF functionality using the API calls, and then map them to the specific peripheral. The available examples aren't very deep yet, so as a first adopter you're going to need to comb through the documentation and leverage whatever F2xx and F4xx examples you can find. void SystemInit_ExtMemCtl(void) { /*-- GPIOs Configuration -----------------------------------------------------*/ /*  +-------------------+--------------------+------------------+------------------+  +                       SRAM pins assignment                                  +  +-------------------+--------------------+------------------+------------------+  | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |  | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |  | PD4  <-> FSMC_NOE | PE7  <-> FSMC_D4   | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |  | PD5  <-> FSMC_NWE | PE8  <-> FSMC_D5   | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |  | PD8  <-> FSMC_D13 | PE9  <-> FSMC_D6   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |  | PD9  <-> FSMC_D14 | PE10 <-> FSMC_D7   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |  | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |  | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7 |------------------+  | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10  | PF14 <-> FSMC_A8 |  | PD14 <-> FSMC_D0  | PE14 <-> FSMC_D11  | PF15 <-> FSMC_A9 |  | PD15 <-> FSMC_D1  | PE15 <-> FSMC_D12  |------------------+  +-------------------+--------------------+ */    /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */   RCC->AHB1ENR   = 0x00000078;   /* Connect PDx pins to FSMC Alternate function */   GPIOD->AFR[0]  = 0x00cc00cc;   GPIOD->AFR[1]  = 0xcc0ccccc;   /* Configure PDx pins in Alternate function mode */   GPIOD->MODER   = 0xa2aa0a0a;   /* Configure PDx pins speed to 100 MHz */   GPIOD->OSPEEDR = 0xf3ff0f0f;   /* Configure PDx pins Output type to push-pull */   GPIOD->OTYPER  = 0x00000000;   /* No pull-up, pull-down for PDx pins */   GPIOD->PUPDR   = 0x00000000;   /* Connect PEx pins to FSMC Alternate function */   GPIOE->AFR[0]  = 0xc00000cc;   GPIOE->AFR[1]  = 0xcccccccc;   /* Configure PEx pins in Alternate function mode */   GPIOE->MODER   = 0xaaaa800a;   /* Configure PEx pins speed to 100 MHz */   GPIOE->OSPEEDR = 0xffffc00f;   /* Configure PEx pins Output type to push-pull */   GPIOE->OTYPER  = 0x00000000;   /* No pull-up, pull-down for PEx pins */   GPIOE->PUPDR   = 0x00000000;   /* Connect PFx pins to FSMC Alternate function */   GPIOF->AFR[0]  = 0x00cccccc;   GPIOF->AFR[1]  = 0xcccc0000;   /* Configure PFx pins in Alternate function mode */   GPIOF->MODER   = 0xaa000aaa;   /* Configure PFx pins speed to 100 MHz */   GPIOF->OSPEEDR = 0xff000fff;   /* Configure PFx pins Output type to push-pull */   GPIOF->OTYPER  = 0x00000000;   /* No pull-up, pull-down for PFx pins */   GPIOF->PUPDR   = 0x00000000;   /* Connect PGx pins to FSMC Alternate function */   GPIOG->AFR[0]  = 0x00cccccc;   GPIOG->AFR[1]  = 0x000000c0;   /* Configure PGx pins in Alternate function mode */   GPIOG->MODER   = 0x00080aaa;   /* Configure PGx pins speed to 100 MHz */   GPIOG->OSPEEDR = 0x000c0fff;   /* Configure PGx pins Output type to push-pull */   GPIOG->OTYPER  = 0x00000000;   /* No pull-up, pull-down for PGx pins */   GPIOG->PUPDR   = 0x00000000; /*-- FSMC Configuration ------------------------------------------------------*/   /* Enable the FSMC interface clock */   RCC->AHB3ENR         = 0x00000001;   /* Configure and enable Bank1_SRAM2 */   FSMC_Bank1->BTCR[2]  = 0x00001015;   FSMC_Bank1->BTCR[3]  = 0x00010400;   FSMC_Bank1E->BWTR[2] = 0x0fffffff; /*   Bank1_SRAM2 is configured as follow:   p.FSMC_AddressSetupTime = 0;   p.FSMC_AddressHoldTime = 0;   p.FSMC_DataSetupTime = 4;   p.FSMC_BusTurnAroundDuration = 1;   p.FSMC_CLKDivision = 0;   p.FSMC_DataLatency = 0;   p.FSMC_AccessMode = FSMC_AccessMode_A;   FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;   FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;   FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;   FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;   FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;   FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;   FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;   FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;   FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;   FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;   FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;   FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;   FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;   FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;   FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; */ }

[megahercas6]

Posted on November 16, 2011 at 07:36

i found this code:

void LCD_CtrlLinesConfig(void) {   GPIO_InitTypeDef GPIO_InitStructure;   /* Enable GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOG | RCC_AHB1Periph_GPIOE |                          RCC_AHB1Periph_GPIOF, ENABLE); /*-- GPIO Configuration ------------------------------------------------------*/   /* SRAM Data lines,  NOE and NWE configuration */   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |                                 GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15 |                                 GPIO_Pin_4 |GPIO_Pin_5;;   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;   GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;   GPIO_Init(GPIOD, &GPIO_InitStructure);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |                                 GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |                                 GPIO_Pin_15;   GPIO_Init(GPIOE, &GPIO_InitStructure);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);   GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);   /* SRAM Address lines configuration */   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;   GPIO_Init(GPIOF, &GPIO_InitStructure);     GPIO_PinAFConfig(GPIOF, GPIO_PinSource0, GPIO_AF_FSMC);          /* NE3 configuration */   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;   GPIO_Init(GPIOG, &GPIO_InitStructure);   GPIO_PinAFConfig(GPIOG, GPIO_PinSource10, GPIO_AF_FSMC); } this is from stm32f4_dsp_stdperiph_lib\STM32F4xx_DSP_StdPeriph_Lib_V1.0.0\Utilities\STM32_EVAL\STM3240_41_G_EVAL\stm324_eval_lcd.c and my pinout for lcd is:   *************************   ** PE0~15 <----> DB0~15   **   ** PD15   <----> nRD           **   ** PD14   <----> RS              **   ** PD13   <----> nWR          **   ** PD12   <----> nCS            **   ** PD11   <----> nReset        **   ************************** i need to modify just this function(LCD_CtrlLinesConfig(void)), or i need to do more ? ( if yes, can some one guide me how to do that ? ) i am using old void LCD_FSMCConfig(void) function, witch is without errors ( then compiling, and i don't know how it works with new processor)