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Problems with usart comunication with interrupts

Marco Pappalardo
Associate II
Posted on September 03, 2012 at 09:13

Hi, 

I'm trying so hard to send and receive data through USART1 of my STM32. I'm using STM32VL_Discovery board, Modbus as communication bus with RS485 interface (I connect my micro to the bus through a MAX232 and SP3485, I personally checked all signals so I'm sure every bit and every word are well coded) and Atollic TrueStudio to develop my application. I succeded in sending from micro to my pc at other end of the bus either single characters or a string. 

My problem is the following: since I would like to implement communication in Modbus protocol, I'd like my micro to receive a request frame from my pc and give a response back so I've tryed to implement a simple interrupt-based system. I've seen some tutorials searching in the web, but nothing seems to work properly. It seems to be an interrupt related problem, but I'm not able to find where is situated my fault. I'm attaching my files, hoping someone can help me.

When I'm seeing result on my Terminal, it doesn't print word CIAO but sometimes CI, sometimes II, sometimes IIIO or similar.

Note: I'm using another channel (Pin 9 on GPIOC) to control an input of SP3485: this input is used to put this chip in receiving mode or in transmit mode. For this reason I use commands to put this channel to high value (transmission) or low value (reception).
1 REPLY 1
Posted on September 03, 2012 at 16:45

#if USE_USART1 #define USARTx USART1 #define USARTx_GPIO GPIOA #define USARTx_CLK_CMD RCC_APB2PeriphClockCmd #define USARTx_CLK RCC_APB2Periph_USART1 #define USARTx_GPIO_CLK RCC_APB2Periph_GPIOB #define USARTx_RTS GPIOC #define USARTx_RTSPin GPIO_Pin_9 #define USARTx_RxPin GPIO_Pin_10 #define USARTx_TxPin GPIO_Pin_9 #define USARTx_IRQn USART1_IRQn #define USARTx_IRQAdd 0xD4 #else

Surely the clocks for GPIOA and GPIOC would be critical here, not GPIOB

Changing RTS should be considerate of TC (Transmit Complete), not TXE which reflects the state of the holding buffer, not the output shift register, or the last bit being clear of the interface.

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