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problem using PLL as SYSCLK over 200MHz on H5

mete
Senior

I am trying to increase FCLK, and I changed the voltage scaling to VOS0, and configured the PLL1 for 240 MHz (src=HSI (HSIDIV=2), M=2, N=30, P=2), but it did not boot (it freezes when a change the system clock mux to PLL1). I realized when I decrease it to 200MHz or so, it works. If I increase it, it does not. It is also same if I change M to 4 and N to 60. The PLL configuration looks valid on the configuration tool. What might I be missing ?

I also tried monitoring PLL1 and SYSCLK on MCO2 and both shows correct 240MHz with the above configuration even if the processor freezes.

(Note: I am not using HAL and the device is STM32H563ZI)

1 ACCEPTED SOLUTION

Accepted Solutions

Hi @mete ,

Check also the flash memory wait states number (from RM0481 rev 1 / Table 37):

SofLit_1-1699544337254.png

 

In your case it should be 5WS.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

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4 REPLIES 4
liaifat85
Senior II

Double-check the power supply and stability of your voltage levels. Sometimes, pushing the clock too high can cause instability if the power supply isn't robust enough.

I am using the NUCLEO H563ZI board and powering from USB. Not sure if it has a limit but you are probably right, I cant think of any other reason yet.

Hi @mete ,

Check also the flash memory wait states number (from RM0481 rev 1 / Table 37):

SofLit_1-1699544337254.png

 

In your case it should be 5WS.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

Totally forgot about the wait states. Thanks for reminding. I changed it and it works fine.