PRECISERR

[nsortur]

Posted on August 15, 2008 at 16:17

PRECISERR

[nsortur]

Posted on May 17, 2011 at 12:41

Hi,

I am getting Hard Fault, the Fault status registers are reading as mentioned below. CFSR => 0x00008200 HFSR => 0x40000000 DFSR => 0x00000000 AFSR => 0x10000001 BFAR => 0x10000001 it is quite clear that it is BUS FAULT. BFARVALID & PRECISERR bits are set in BFSR. But register BFAR does not reflect valid address. I went through the book ''The Definitive guide to the ARM Cortex-M3'' and came to know that PRECISERR bus faults are caused by data accesses. How can i debug such case, where the BFAR is not reading valid address when PRECISERR occurs?. Thanks in advance. Simha

[nsortur]

Posted on May 17, 2011 at 12:41

Hi,

Thanks for the reply. Sorry about confusion. The address reflected in BFAR is valid address which caused fault. This address is reserved in the STM32 micro-controller, so i understand that when accessing value at address 0x10000001 which is a reserved address in STM32 micro-controller causing bus fault and hence hard fault. If I understand correctly, an instruction when accessed memory in the reserved address range, that should cause memory fault such as data access violation and instruction access violation etc. But i do not understand why the bus fault!!!. Thanks, Simha

[16-32micros]

Posted on May 17, 2011 at 12:41

Hi Simha,

Some kind of pointers are here as well

http://www.st.com/mcu/forums-cat-6778-23.html

and Answers by the Author of the ''The Definitive guide to the ARM Cortex-M3'' book him self :) Cheers, STOne-32.

[jon1]

Posted on May 17, 2011 at 12:41

Are you certain that the BFAR does not show the address which caused the fault? If the NVIC BFSR BFARVALID bit is set, then the BFAR should be giving the correct address of the data access that caused the fault. (If that bit is not set due to an imprecise fault, then the BFAR address is not valid).

Have you looked at the stacked program counter value and the opcode of the instruction which caused the fault?