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pin returns low sometime after spi is done.

ulao
Associate III
 
1 ACCEPTED SOLUTION

Accepted Solutions
AScha.3
Chief III

just try:

0693W00000Y7VA7QAN.png 

...keepIO -> .._ENABLE . (now is disable )

If you feel a post has answered your question, please click "Accept as Solution".

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6 REPLIES 6
ulao
Associate III

This could very well be the code I'm working with, after all it is 8k lines of code. So not expecting anyone here to fix this but I'm curios how stm works in this way.

my spi cs line ( hardware nss) goes low 3us after my spi is complete. But the spi does first raise the line and bring it low like it should. When it is done it returns it to the high position. but 3 us later it falls again. I'm wondering if I'm not understanding this alternative mode right?

//cs

   GPIO_InitStruct.Pin = GPIO_PIN_5 ;

   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;

   GPIO_InitStruct.Pull = GPIO_PULLUP;

   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;

   GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;

   HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);

does this mean that the pin is used both as a GPIO for TTL and also for spi5? What tells the pin how it should act when the spi is done. I want it to be out and high when spi is not in use.

seeing this (CS is the top line).

0693W00000Y7PC7QAN.png 

 note: putting an external pull up on it works but woudl not think tat was needed.

S.Ma
Principal

Unless it is a new SPI IP version on newer STM32, most SPI in master mode use NSS as SW GPIO mode. In slave mode HW NSS is supposed to tristate the pins when not selected.

Pavel A.
Evangelist III

Which STM32? Some of them have option for master mode to release control of the hardware NSS after transfer done. If this option is deselected the pin remains under control of the SPI module.

ulao
Associate III

its a newer hip stmh7

this is my config

hspi5.Instance = SPI5;
	hspi5.Init.Mode = SPI_MODE_MASTER;
	hspi5.Init.Direction = SPI_DIRECTION_2LINES;
	hspi5.Init.DataSize = SPI_DATASIZE_8BIT;
	hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
	hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
	hspi5.Init.NSS = SPI_NSS_HARD_OUTPUT;
	hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
	hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
	hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
	hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
	hspi5.Init.CRCPolynomial = 0x0;
	hspi5.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
	hspi5.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
	hspi5.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
	hspi5.Init.TxCRCInitializationPattern =
			SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
	hspi5.Init.RxCRCInitializationPattern =
			SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
	hspi5.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
	hspi5.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
	hspi5.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
	hspi5.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
	hspi5.Init.IOSwap = SPI_IO_SWAP_DISABLE;

AScha.3
Chief III

just try:

0693W00000Y7VA7QAN.png 

...keepIO -> .._ENABLE . (now is disable )

If you feel a post has answered your question, please click "Accept as Solution".
ulao
Associate III

wonderful thx!