2020-08-13 01:00 AM
Hi,
the IPR bit assignment in 'PM0253 Rev 5 p.189' tells me that a number of bits [n-1:0] are read as zero and ignore writes.
At this point n isn't 'n = m MOD 4'.
Obviously n is 4 because i can write only the four upper bits and bits [3:0] stay at zero.
So i have only a priority value of 0-15 left-shifted by 4.
Do i make a mistake?
Does someone have a better document for the NVIC?
For functional safety i have to readback all registers and check them. If i write 0x16 to a register and read 0x10 back i have a problem. I am not using CMSIS or HAL.
Kind regards
Daniel
Solved! Go to Solution.
2020-08-13 01:21 AM
The ARM IPs in the MCUs is described in the PM0253 "STM32F7 Series and STM32H7 Series Cortex®-M7 processor programming manual". ST implementation specific features are described in RM0433. Reference manual. And yes, it says 4 bit.
2020-08-13 01:21 AM
The ARM IPs in the MCUs is described in the PM0253 "STM32F7 Series and STM32H7 Series Cortex®-M7 processor programming manual". ST implementation specific features are described in RM0433. Reference manual. And yes, it says 4 bit.
2020-08-13 01:30 AM
Thank you!
The short text about the NVIC features - i didn't read it carefully enough (RM0433 Rev7 p.753).
16 programmable priority levels (4 bits of interrupt priority are used)
Kind regards
Daniel