NVIC - Confused

[giles]

Posted on May 11, 2009 at 20:19

NVIC - Confused

[giles]

Posted on May 17, 2011 at 12:27

Hi,

I'm using a number of interrupts using the st firmware library and setting pre-emption and subpriorities, however it looks to me like that if an interrupt is already executing a higher priority (lower number) interrupt doesn't interrupt it. Is this right? Is there a way to get the higher priority interrupt to interrupt an already executing lower priority interrupt without clearing the status on the interrupt trigger of the lower priority interrupt when i enter it. I have 3 interrupts: 2 timers and a usart, I need timer 1 to be able to interrupt the main code or either of the other interrupts, timer 2 to be able to interrupt the usart or main code usart to interrupt just the main code. Any ideas? Cheers, Giles.

[lanchon]

Posted on May 17, 2011 at 12:27

again, I haven't read about ints yet but:

> I'm figuring that theres a bit to enable the interrupt to trigger while ones already running doesn't make sense at all. two options: -the bit has to be set in the handler: that absolutely doesn't make sense since it would induce a latency that could not be eliminated, and the cortex is designed to be low latency. -the bit has to be configured before the interrupt: doesn't make sense, since that configuration is already done when you select how many of the priority bits are preemptive and how many aren't. (select all bits as subpriority, and then what do you need the bit for?)

[lanchon]

Posted on May 17, 2011 at 12:27

> it looks to me like that if an interrupt is already executing a higher priority (lower number) interrupt doesn't interrupt it.

I haven't researched interrupts for now, but I will soon. for now my understanding is that you're wrong. higher preemption priorities do interrupt, while subpriorities do not. subpriorities just order processing of pending ints within the same preemption priority level. subpriorities limit stack usage and greatly facilitate inter-interrupt communication (ie: handlers are mutually exclusive). also subpriorities increase total throughput in the cortex (back 2 back ints need not save state to stack). the cost is of course higher latency.

[giles]

Posted on May 17, 2011 at 12:27

I was under that impression before i had this problem-

With the following settings with timer 1 cc2 just calling an interrupt that togglings a pin (GPIOA->ODR ^= 1;) (at 20Khz)it produces a perfect square wave on my scope till i start communications on the usart. When i start communications on the usart my square wave skips has significant delays occuring at the point the usart interrupt is running. NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* Enable the TIM4 Interrupt - this will preemp USART1 interrupt. */ NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); It appears to me based on outputs to my scope that what i described originally is happening, I'm figuring that theres a bit to enable the interrupt to trigger while ones already running and that this isn't set as default to save the stack. I'm aware there are 2 modes: Pulse and Level for interrupts but not how to change to pulse if that would be the correct setting even. :o Any clues?

[giles]

Posted on May 17, 2011 at 12:27

It turns out i was indeed wrong - it was the Priority Group i had selected i was using more bits than i had assigned.

Sorry to have wasted your time.

[rraval]

Posted on May 17, 2011 at 12:27

Hi there,

Do you mind explaining me what happened to your problem? I have simila r problem. When I am trying to enable and disable interrupts using NVIC, doesn't seems to be working. I have TIM2 that I want to be at priority 0. I have external EXTI5_9 that is at priority 0. When I am in EXTI5_9 interrupt I want to disable TIM2. TIM2 sometimes triggers between my EXTI5_9 ISR and creates trouble. For now, I am just disabling timer interrupt to avoid it being interrupting EXTI5_9. This is working but not the NVIC one. I mak sure that I am enabling proper bit in Clear/SETenable register for NVIC. //////////////////THIS CODE DOESN't WORK//////////////////// NVIC_SETPRIMASK(); /* DIsable TIM2 */ NVIC->ICER[0] = 0x10000000; NVIC_RESETPRIMASK(); //////////////////THIS CODE DOESN't WORK//////////////////// Any ideas?