NSS hardware control works on 407VG, but not on 405RG

denny2 · ‎2016-02-04

Posted on February 04, 2016 at 10:18

Hi,

I want to use the hardware control of SPI3-NSS pin. I wrote a code for it on the Discovery board with the STM407VG and it works as intended. I use the drivers from the older Discovery bundle, not the STMCube. Upon the command 'SPI_Cmd(SPI3, ENABLE);' the NSS pin goes down as intended, and upon the command 'SPI_Cmd(SPI3, DISABLE);' the NSS pin goes back up, just as it should. But when I download the code to the STM405RG chip which is the target for the Project, nothing happens on the pin. I can't find an errata, does anyone know if the 405RG is defect?

Update: I was sure the problem was solved, and edited the post. However, the problem remains: with identical code and using pull-up or no-pull on the target boards make no difference. The code works on the 407 but not on the 405. Here below is the relevant setup code I use.

/D

/////////////////////////////////////////////////////////////////////////////

// Initilize SPI

/////////////////////////////////////////////////////////////////////////////

SPI_InitTypeDef SPI_InitStruct;

// Set default values in SPI_InitStruct:

// SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;

// SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;

// SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;

// SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;

// SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;

// SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;

// SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;

// SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;

// SPI_InitStruct->SPI_CRCPolynomial = 7;

SPI_StructInit(&SPI_InitStruct);

// Customize:

SPI_InitStruct.SPI_Mode = SPI_Mode_Master;

#ifdef targetSTMF405RG

SPI_InitStruct.SPI_NSS = SPI_NSS_Soft; //workaround for the 405 target

#endif

SPI_InitStruct.SPI_DataSize = SPI_DataSize_16b;

SPI_InitStruct.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;

/////////////////////////////////////////////////////////////////////////////

// Initilize GPIO for SPI

/////////////////////////////////////////////////////////////////////////////

//GPIO_InitTypeDef GPIO_InitStruct;

// Reset GPIO init structure parameters values

// GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;

// GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN;

// GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;

// GPIO_InitStruct->GPIO_OType = GPIO_OType_PP;

// GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL;

GPIO_StructInit(&GPIO_InitStruct);

//GPIO_InitStruct.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_5;

GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;

GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;

GPIO_DeInit(GPIOB);

GPIO_Init(GPIOB, &GPIO_InitStruct);

GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4;

GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP; // borde vara PuPd_UP enl Maximkortet

#ifdef targetSTMF405RG

GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; //workaround

#endif//405

GPIO_DeInit(GPIOA);

GPIO_Init(GPIOA, &GPIO_InitStruct);

// See datasheet DM00037051.pdf, Table 9 columns AF5 and AF6 for pin mapping

#ifdef targetSTMF407VG

GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_SPI3); // SPI3_NSS

#endif//407

#ifdef targetSTMF405RG

GPIO_SetBits(GPIOA, GPIO_Pin_4);

#endif//405

GPIO_PinAFConfig(GPIOB, GPIO_PinSource3, GPIO_AF_SPI3); // SPI3_SCK

GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_SPI3); // SPI3_MOSI

SPI_I2S_DeInit(SPI3);

SPI_Init(SPI3, &SPI_InitStruct);

#ifdef targetSTMF407VG

SPI_SSOutputCmd(SPI3, ENABLE);

#endif//407

waclawek.jan · ‎2016-02-04

Posted on February 04, 2016 at 11:22

Can you please be more specific, which pin are you talking about (and, is it the same pin on both chips)?

> Upon the command 'SPI_Cmd(SPI3, ENABLE);' the NSS pin goes down as intended,

SPI is used as master, I presume. NSS does not go down with setting SPI_CR1.SPE, rather, when SPI starts to transmit (the UM is not very clear on the details, but presumably it is just after the first byte/word has been written into DR, and TXE went low).

JW

Amel NASRI · ‎2016-02-04

Posted on February 04, 2016 at 11:22

Hi PapaD,

There are 2 NSS pins available, which one are you using?

Are you configuring the same debug mode (SWD) for both devices?

-Mayla-

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

denny2 · ‎2016-02-04

Posted on February 04, 2016 at 11:31

Hi Mayla,

I am using the GPIOA, pin 4.

And yes, the same debug mode for both targets.

As a side note, I used a workaround, setting up the pin as a regular output and replaced the lines 'SPI_CMD(...);' with 'GPIO_ResetBits(GPIOA, GPIO_Pin_4);' and 'GPIO_SetBits(GPIOA, GPIO_Pin_4)'; just to finish the project.

denny2 · ‎2016-02-04

Posted on February 04, 2016 at 11:35

Hi Jan,

yes the SPI3 is setup as master. The code is identical, and it works when downloaded to the Discovery board but not on the 405 target board.

And to my knowledge and experience: the NSS pin is toggled by the

'SPI_Cmd(SPI3, ENABLE);' and 'SPI_Cmd(SPI3, DISABLE);'

I use a scope and see this as I step through the code.

qwer.asdf · ‎2016-02-04

Posted on February 04, 2016 at 11:42

Are you sure you have selected the alternate function mode for the NSS pin? Also initialized the SPI to use hardware NSS:

...

SPI_InitStructure.

SPI_NSS

= SPI_NSS_Hard;

...

And you are enabling the SS output handling using the SPI_SSOutputCmd function?

...

SPI_SSOutputCmd

(SPI3, ENABLE);

...

Read the ''Slave select (NSS) pin management'' section in the reference manual.

denny2 · ‎2016-02-04

Posted on February 04, 2016 at 11:46

qwer.asdf:

The answer is yes to your questions

And as I said, it works on the 407VG target. With the workaround, naturally I do not set up AF for the pin.

I posted the relevant part of the code in an update at the first post of this thread. When I debug I check the SPI3 register and there are no differences between targets: Output is enabled, and Master is set.

waclawek.jan · ‎2016-02-04

Posted on February 04, 2016 at 17:00

So, is it true that in both cases, you transmit through SPI normally (confirmed by oscilloscope), the only difference being that on '407V you see NSS toggling low/high, but on '405 you see NSS always high?

JW

denny2 · ‎2016-02-04

Posted on February 05, 2016 at 08:46

Jan,

almost correct: The NSS pin is always low on 405RG, confirmed by oscilloscope.

At the command

'GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_SPI3);'

the NSS pin goes high on the 407 and afterwards it responds at the commands

'SPI_Cmd(SPI3, ENABLE);'

where is goes down, and at the commands

'SPI_Cmd(SPI3, DISABLE);'

where it goes high. This is how I understood it is supposed to work on the F4 series, by reading a post on this forum by someone from ST. But on the 405RG the pin is always low.

I use the '#define tagetSTM405RG' to implement the workaround to get it to toggle on both targets. But the ''right'' code only works on the 407.

/D

waclawek.jan · ‎2016-02-05

Posted on February 05, 2016 at 12:36

> 'GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_SPI3);'

> the NSS pin goes high on the 407

[...]

> NSS pin is always low on 405RG, confirmed by oscilloscope.

Oh.

So, on the '405, if you set A4 as GPIO OUTPUT, set it to high, then change to AF, will it go immediately low, even if SPI is still in after-reset-disabled state?

Can you produce a minimal, but complete compilable example exhibiting the problem?

You can try to play with these things directly accessing registers in the debugger.

JW