Skip to main content
Singh.Harjit
Senior
July 5, 2010
Question

No definition for DWT in Core_cm3.h?

  • July 5, 2010
  • 5 replies
  • 1121 views
Posted on July 05, 2010 at 18:55

No definition for DWT in Core_cm3.h?

    This topic has been closed for replies.

    5 replies

    swhite2
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 13:57

    Why would you want to access the

    http://infocenter.arm.com/help/topic/com.arm.doc.ddi0337h/BIIFBHIF.html

    (DWT) from code? Typically a debugger does that.

    If you really want to you can look at the

    http://infocenter.arm.com/help/topic/com.arm.doc.ddi0337h/BABJFFGJ.html

    .

    epassoni950
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 13:57

    Hello,

    It seems that you can't use cycle counter for delay loops.

    When you read Cortex-M3 documentation from ARM, DDI0337G, there is a register at address 0xE000EDFC named DEMCR (Debug exception and Monitor Control Register) (chapter 10.2.4). In this register, bit TRCENA (bit 24) must be set to enable use of DWT which contains cycle counter. But in chapter 10.1, documentation say that this register can't be accessed by the processor itself but only by the debugger.

    I made some tests and I have seen that it not possible to enable cycle counter without a debugger like Jlink in JTAG or SWD mode.

    Regards

    Eric
    Singh.Harjit
    Senior
    May 17, 2011
    Posted on May 17, 2011 at 13:57

    Thank you for the link.

    I want to use the cycle counter feature to measure the time for different routines. Also, I was thinking of using it for delay loops...

    I would think regardless of the usage, the registers would be documented...

    epassoni950
    Associate II
    May 17, 2011
    Posted on May 17, 2011 at 13:57

    Hello,

    You are right. I made a mistake in my test. I try to enable cycle counter by writing in DWT_CONTROL before writing in SCB_DEMCR. By swapping the 2 writes, cycle counter is ok even without a debugger.

    Thank you

    Eric
    Tesla DeLorean
    Guru
    May 17, 2011
    Posted on May 17, 2011 at 13:57

    I made some tests and I have seen that it not possible to enable cycle counter without a debugger like Jlink in JTAG or SWD mode.

     

    Pretty sure that's hogwash. The cycle counter on the STM32F103RET6 within the trace unit is totally usable from a serial terminal , with no JTAG pod anywhere near the device.

                     // From http://forums.arm.com/index.php?showtopic=13949

                    volatile unsigned int *DWT_CYCCNT     = (volatile unsigned int *)0xE0001004; //address of the register

                    volatile unsigned int *DWT_CONTROL    = (volatile unsigned int *)0xE0001000; //address of the register

                    volatile unsigned int *SCB_DEMCR         = (volatile unsigned int *)0xE000EDFC; //address of the register

                    *SCB_DEMCR = *SCB_DEMCR | 0x01000000;

                    *DWT_CYCCNT = 0; // reset the counter

                    *DWT_CONTROL = *DWT_CONTROL | 1 ; // enable the counter

    #define STOPWATCH_START { cyc[0] = *DWT_CYCCNT;}

    #define STOPWATCH_STOP { cyc[1] = *DWT_CYCCNT; cyc[1] = cyc[1] - cyc[0]; }

    Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..