How does stm32H723 ADC ISR know which channel ?

[Niramas]

I am just getting started with the stm32h723 ADC.    If I create a regular sequence group of several input channels, how does my ISR know which channel was sampled last (which channel's data is in the DR)?  I don't see this in the registers.

Thanks,

Mark 

[Tesla DeLorean]

Typically you'd DMA a group of channels into an array, and then get an interrupt for some multiple of them.

[Niramas]

So I have to go down another rabbit hole to get my ADC data?   Is there a code example for the ADC-DMA transfer?

[Imen.D]

Hello @Niramas ,

You can get inspired from the "ADC DMA Transfer" example runs on STM32H743xx devices:

STM32CubeH7/Projects/NUCLEO-H743ZI/Examples/ADC/ADC_DMA_Transfer at master · STMicroelectronics/STM32CubeH7 · GitHub

This example can be easily tailored to any other supported device and development board.

[Niramas]

So are the examples for any STM32H7 variant applicable to the STM32H723?    I was only looking in the 723 examples folder.

[Imen.D]

You can use the ADC example from STM32H735 device which is a pin-to-pin compatible with STM32H723:

STM32CubeH7/Projects/STM32H735G-DK/Examples/ADC/ADC_DMA_Transfer at master · STMicroelectronics/STM32CubeH7 · GitHub

But always consult the datasheets and reference manuals for detailed comparison.

[Tesla DeLorean]

Not sure it's a rabbit hole, just not an 8-bit programming / 1-dimensional approach.

The concept is to allow for decimation of interrupt loading, and allow for more rapid/consistent cycling of the ADC, ie uniform sample rate so time-domain based analysis is workable.

Now if you want to sample individual channels on ADC1, ADC2, ADCn, then you can do that.

[Niramas]

Everything is a rabbit hole on modern controllers. That's why the RM has 68 chapters.