2015-04-12 07:50 AM
Hello everyone!
I am using STM32F103RET for my project. I need to communicate by SPI with a low speed digital device with the speed of at most 1KHz clock. At the same time, I need to have my own cpu clock as high as possible. As I saw at the reference manual, I just can decrease SPI clock to APB2/256 which is too high ( at the best situation, CPU_clock/16/256 -> 72MHz/16/256 = 17KHz - by loosing APB2 speed to CPU_clock/16 ) have I hopefully, missed a point? Is there any way to have lower speed SPI with keeping system speed high? #stm32f10x2015-04-12 01:57 PM
Is there any way to have lower speed SPI with keeping system speed high?
Pretend to be a Slave on the bus, an supply the clock? I2S mode might afford more rates. Other than that perhaps consider bit-banging the bus via GPIO pins in the 1ms ticker? SPI is one of the areas where the STM32 is unduly inflexible.2015-04-13 06:44 AM
You may be able to use a USART, which can be set to low baud rates. For example, we have used USART3 on the F103 for SPI as a master driving MOSI.
Depending on the needs of the attached device, you may have to reorder the bits sent.2015-04-15 03:24 AM
Thanks clive1
I reached to this same solution. Here, the device was a shift register which the digital lines were passed through opto-couplers ( that limit the rate ) and I was about to clock the register by mcu. By the way, it was weird to here this limitation in my favorite STM MCUs!2015-04-15 03:30 AM
Thanks Chris T
Your solution looks really smart! I may test it if the latter solution were in trouble. If I knew it, I would consider it in my PCB