Muxed PSRAM compatible memory

[LMica]

Hello,

I am using a STM32H745 in LQFP144 package and as far as I understand it supports only muxed PSRAM since the pins for non-muxed memory are missing in this package and the CubeMX software does not have the option to setup non-muxed PSRAM on this MCU. Do I understand this right?

I have found a question on this forum about the memory compatible with muxed interface but the topic is from 2014 and now I cannot source the suggested memory IC. Is there a muxed PSRAM available today?

Thank you

[waclawek.jan]

> Is there a muxed PSRAM available today?

I don't know but as I've said in that thread, you can demux addresses from data using a latch.

JW

[LMica]

How can I demux adresses from data? I understand the principle of latch but I am not sure how to connect the latch between the MCU and memory. Could you please explain or point me at some article or documentation about the muxed PSRAM communication protocol and its demuxing? In the STM32H745 docs I have found some graphs of write and read operation waveforms but I can't deduce the latch connections from that.

I suppose the AD0-15 pins should be connected to the memory data pins and to the latch input, Latch output and the A16-24 pins should be connected to the addres pins on the memory. Is this correct?

[Tesla DeLorean]

You'd take NADV, you'd use it to clock some latches (flop-flops), the rising edge clocks/latches the lower 16 bits of the address bus, and you'd likely want to latch/decode A16..A25 also depending on the transaction mode.

And yes, you'd feed the address to your memory sub-system