2014-12-10 02:10 AM
2014-12-10 02:19 AM
I found an error in the code:
clock of TIM15 and TIM16 not enabeled. Actually: /* TIM2, TIM3 and TIM4 clock enable */RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 , ENABLE); Should be replaced by: /* TIM2, TIM15 and TIM16 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM16, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM15, ENABLE);
2014-12-10 06:18 AM
No TIM3 or TIM4 available for that STM32F302!
That is true only for STM32F302x6/8. These 2 timers are available in STM32F302xB/C.-Mayla-To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2014-12-17 08:33 AM
I'm trying to port the ST TIM_Synchronization to my evaluation board Nucleo STM32F302R8T6 without success.
I used only 2 cascaded timers TIM1 & TIM2. TIM1 is configured as Master Timer: - PWM Mode is used - The TIM1 Update event is used as Trigger Output TIM2 is slave for TIM1 - PWM Mode is used - The ITR1(TIM1) is used as input trigger - Gated mode is used, so start and stop of slave counter are controlled by the Master trigger output signal(TIM1 update event). Here is my code:/********************************************************************************
* @file TIM/TIM_Synchronization/main.c
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include ''stm32f30x.h''
/* Private function prototypes -----------------------------------------------*/
static void TIM_Config(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Configure the TIMs.
* @param None
* @retval None
*/
static void TIM_Config(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
int Prescaler, Period;
/* TIM2, TIM1 clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* GPIOA clocks enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
/* GPIOA Configuration: TIM2_CH1 as alternate function push-pull */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_6); // TIM1_CH1 PA8 AF6
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource0, GPIO_AF_1); // TIM2_CH1 PA0 AF1
Prescaler = (SystemCoreClock / 8000000); // 8 MHz timebase, assumes APB2 H/1 TIMCLK1 H/1
Period = 8000000 / 200000; // 8 MHz -> 200 KHz
/* Time base configuration */
TIM_TimeBaseStructure.TIM_Period = Period - 1;
TIM_TimeBaseStructure.TIM_Prescaler = Prescaler - 1;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
/* Master Configuration in PWM1 Mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
TIM_OCInitStructure.TIM_Pulse = Period / 2; // 50%
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
/* Enable pins, TIM1 more sensitive */
TIM_CtrlPWMOutputs(TIM1, ENABLE);
/* TIM1 enable counter */
TIM_Cmd(TIM1, ENABLE);
/* Timers synchronisation in cascade mode ----------------------------
1/TIM1 is configured as Master Timer:
- PWM Mode is used
- The TIM1 Update event is used as Trigger Output
2/TIM2 is slave for TIM1
- PWM Mode is used
- The ITR1(TIM1) is used as input trigger
- Gated mode is used, so start and stop of slave counter
are controlled by the Master trigger output signal(TIM1 update event).
--------------------------------------------------------------------------- */
/* Select the Master Slave Mode */
TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
/* Master Mode selection */
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
/* Slaves Configuration: PWM1 Mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OCInitStructure.TIM_Pulse = Period / 2;
TIM_OC1Init(TIM2, &TIM_OCInitStructure);
/* Slave Mode selection: TIM2 */
TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_Gated);
TIM_SelectInputTrigger(TIM2, TIM_TS_ITR1);
/* TIM enable counter */
TIM_Cmd(TIM2, ENABLE);
}
/**
* @brief Main program.
* @param None
* @retval None
*/
int main(void)
{
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
file (startup_stm32f30x.s) before to branch to application main.
To reconfigure the default setting of SystemInit() function, refer to
system_stm32f30x.c file
*/
/* TIMs Configuration */
TIM_Config();
/* Infinite loop */
while (1)
{
}
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf(''Wrong parameters value: file %s on line %d\r\n'', file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ Thanks for any help.
2014-12-18 01:54 AM
Any avalaible help?
Or working example? Thanks2014-12-18 02:19 AM
Is there some internal trigger connection?
Changing from ITR0 gives result.