2014-01-07 02:00 PM
Using an STM32F407xx, I want to monitor Vdd by connecting it to Vbat and using ADC1_IN18. If I am not actually powering my device from the battery, is it still possible (or advisable) to do this?
The reason that I am not using one of the on-chip ADC channels is because I have none available. #stm32 #vbat-monitoring #vbat #!bug2014-01-08 01:19 AM
Hi
''I want to monitor Vdd by connecting it to Vbat and using ADC1_IN18.'' ''is it still possible (or advisable) to do this?'' If the battery voltage is beyond the max voltage allowable for the device (see the data sheet) then NO - you will destroy the processor!2014-01-08 06:54 AM
As long as you make sure Vbat doesn't exceed Vdda then yes, you can use it as an ADC input. Bear in mind that IN18 measures Vbat/2 so you have to adjust the conversion values. You may need a long sample time too, try at least 5 or 10 microseconds on ADC1 for IN18.
You can also check Vdd indirectly ny using the bandgap voltage reference ADC channel. If Vdda is tied to Vdd then the fixed 1.2V bandgap sample conversion will vary up or down based on Vdda (the ADC reference). You can calculate what voltage is present at Vdda by working back from the bandgap reference. Using the bandgap reference also tells you when Vdda is stable and you can begin ADC conversions. Jack Peacock2014-01-08 07:17 AM
You can also check Vdd indirectly ny using the bandgap voltage reference ADC channel.
This actually is preferred way of measuring supply voltage - because then you avoid errors caused by voltage divider which is not that ideal (check datasheet).2014-01-08 11:17 AM
@sun.cheng.chung:
Vbat Max = 3.6VTying Vbat to Vdd should not destroy the processor if Vdd stays within the acceptable range. If you look athttp://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf
, it says that you should tie Vbat to Vdd if you do not tie PDR_ON to Vdd. In my configuration, PDR_ON is tied to Vdd, so I am not sure if it is a bad thing to tie Vbat to Vdd also.@Community member:In terms of Vbat exceeding Vdda, am I right in saying that this condition only matters if you are trying to use the ADC? I am saying this because if you have a battery attached to an MCU and then the Vdda boots, Vbat will be greater than Vdda until the supply comes up. Do I need to have a routine that checks that Vdda is up and disables ADC conversions until it is up to 3.3V?In my design, Vdd and Vdda are supplied by two different power supplies, so I will not be able to measure Vdd through the bandgap reference.@ogden1The error on the resistor divider is +/- 1%, which on 3.3V is +/-33mV. Would we expect to be able to tune out this value using the bandgap reference?2014-01-08 11:50 AM
The error on the resistor divider is +/- 1%, which on 3.3V is +/-33mV. Would we expect to be able to tune out this value using the bandgap reference?
Maybe not. Possibly if you take VREFIN_CAL factory calibration data in account. Anyway I don't see any point to invent wheel thinking about how to use VBAT, divider together with bandgap for this purpose if you can simply measure bandgap :) Well.. perhaps for you fiddling with VBAT could be solution because as you say - your VDDA != VDD2014-01-08 02:20 PM
I agree with you that if Vdd == Vdda, then this issue is moot. But since, in my case, Vdd != Vdda, and I do not have any open ADC pins, this seems to be my only option.
2014-01-09 09:35 AM
The more that I think about it, the less I understand being able to measure Vdda through the band gap reference. I am assuming that the bandgap reference is what the docs call ''Vrefint.''
I am assuming that in the ADC, you need some kind of absolute analog reference in order to be able to measure anything. If you are unsure as to the voltage of Vdda or Vrefint, how can you actually trust anything that you convert?